[U-Boot] [PATCH v1 0/4] Jetson-TK1 support for PSCI

[Ian Campbell <ijc@hellion.org.uk>]

On Thu, 2015-02-05 at 12:44 +0100, Thierry Reding wrote:

> We've had some discussions about this internally and I think this should
> not be a problem after all. The Tegra flow controller can be programmed
> to automatically coordinate with the PMC to powergate CPUs when they
> encounter a WFI instruction and unpowergate CPUs again when they are
> woken up. With that in place the PMC registers don't need to be touched
> anymore once the CPUs have been booted once.
> 
> The solution that was discussed internally would involve having the
> secure monitor (U-Boot's PSCI implementation in this case) program the
> flow controller appropriately, point the CPU reset vectors to a location
> containing a WFI instruction and power up the CPUs. That way they should
> immediately be powergated when they reach the WFI instruction and the
> PSCI implementation would then be able to wake them up without accessing
> the PMC registers once the kernel has booted.
> 
> Adding Peter. Please correct me if I misunderstood what we discussed.
> Can you also provide Ian with pointers to the registers that need to be
> programmed to make this work? I suspect that a lot of it can be gleaned
> from the cpuidle drivers in arch/arm/mach-tegra in the upstream Linux
> kernel.

Thanks, any *info would be good even though I could likely decode it
from the driver...

I'm afraid I've been a bit slack about updating the series with the
other comments, mostly because I've been procrastinating over this
powergate issue.

Ian.