From: Nishanth Menon <nm@ti.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH V2 4/9] ARM: Provide a mechanism to invoke SoC specific errata WA for CP15
Date: Tue, 24 Feb 2015 16:57:47 -0600 [thread overview]
Message-ID: <1424818672-29501-5-git-send-email-nm@ti.com> (raw)
In-Reply-To: <1424818672-29501-1-git-send-email-nm@ti.com>
Every SoC has slightly different manner of setting up access
to L2ACLR and similar registers since the Secure Monitor handling
of Secure Monitor Call(smc) is diverse. Hence an ARCH specific
macro is introduced to implement SoC specific errata workaround
implementations.
Signed-off-by: Nishanth Menon <nm@ti.com>
---
README | 5 +++++
arch/arm/cpu/armv7/start.S | 14 ++++++++++++++
2 files changed, 19 insertions(+)
diff --git a/README b/README
index a28ff133ee05..2e53e0c5757d 100644
--- a/README
+++ b/README
@@ -621,6 +621,11 @@ The following options need to be configured:
exists, unlike the similar options in the Linux kernel. Do not
set these options unless they apply!
+ NOTE: The following are machine specific errata that are enabled
+ with CONFIG_ARM_ARCH_CP15_ERRATA define. These need to have an
+ SoC specific implementation of the erratum workaround to
+ function.
+
- Driver Model
Driver model is a new framework for devices in U-Boot
introduced in early 2014. U-Boot is being progressively
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 70048c10aee6..3b814d8f42d3 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -163,6 +163,20 @@ ENTRY(cpu_init_cp15)
mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register
#endif
+#ifdef CONFIG_ARM_ARCH_CP15_ERRATA
+ mrc p15, 0, r0, c0, c0, 0 @ r0 has Read Main ID Register (MIDR)
+ mov r1, r0, lsr #20 @ get variant field
+ and r1, r1, #0xf @ r1 has CPU variant
+ and r2, r0, #0xf @ r2 has CPU revision
+ mov r3, r1, lsl #4 @ shift variant field for combined value
+ orr r3, r2, r3 @ r3 has combined CPU variant + revision
+ /* C Prototype:
+ * void arch_cp15_errata_workaround(u32 midr, u32 variant,
+ * u32 rev, u32 comb);
+ */
+ b arch_cp15_errata_workaround @ Do Machine specific errata WAs
+#endif
+
mov pc, lr @ back to my caller
ENDPROC(cpu_init_cp15)
--
1.7.9.5
next prev parent reply other threads:[~2015-02-24 22:57 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-24 22:57 [U-Boot] [PATCH V2 0/9] ARM: OMAP3-DRA7: CP15 erratum workarounds and improvements Nishanth Menon
2015-02-24 22:57 ` [U-Boot] [PATCH V2 1/9] ARM: OMAP: Change set_pl310_ctrl_reg to be generic Nishanth Menon
2015-02-24 22:57 ` [U-Boot] [PATCH V2 2/9] ARM: OMAP3: Rename omap3.h to omap.h to be generic as all SoCs Nishanth Menon
2015-02-25 11:02 ` Paul Kocialkowski
2015-02-25 17:53 ` Nishanth Menon
2015-02-24 22:57 ` [U-Boot] [PATCH V2 3/9] ARM: OMAP3: Get rid of omap3_gp_romcode_call and replace with omap_smc1 Nishanth Menon
2015-02-25 11:06 ` Paul Kocialkowski
2015-02-24 22:57 ` Nishanth Menon [this message]
2015-02-24 22:57 ` [U-Boot] [PATCH V2 5/9] ARM: DRA7 / OMAP5: Add workaround for ARM errata 798870 Nishanth Menon
2015-02-24 22:57 ` [U-Boot] [PATCH V2 6/9] configs: ti_omap5_common: Enable " Nishanth Menon
2015-02-24 22:57 ` [U-Boot] [PATCH V2 7/9] ARM: OMAP3: Introduce OMAP3 Cortex-A8 revision specific errata Nishanth Menon
2015-02-25 11:15 ` Paul Kocialkowski
2015-02-25 19:49 ` Nishanth Menon
2015-03-03 7:30 ` Siarhei Siamashka
2015-02-24 22:57 ` [U-Boot] [PATCH V2 8/9] configs: ti_omap3_common: Enable workaround for ARM errata 454179, 430973, 621766 Nishanth Menon
2015-02-25 11:19 ` Paul Kocialkowski
2015-02-25 11:31 ` Igor Grinberg
2015-02-25 12:27 ` Paul Kocialkowski
2015-02-25 14:32 ` menon.nishanth at gmail.com
2015-02-25 21:23 ` Paul Kocialkowski
2015-02-26 5:11 ` Nishanth Menon
2015-02-27 19:27 ` Paul Kocialkowski
2015-02-24 22:57 ` [U-Boot] [PATCH V2 9/9] ARM: OMAP5 / DRA7: Setup L2 Aux Control Register with recommended configuration Nishanth Menon
-- strict thread matches above, loose matches on Subject: below --
2015-02-24 22:52 [U-Boot] [PATCH V2 0/9] ARM: OMAP3-DRA7: CP15 erratum workarounds and improvements Nishanth Menon
2015-02-24 22:52 ` [U-Boot] [PATCH V2 4/9] ARM: Provide a mechanism to invoke SoC specific errata WA for CP15 Nishanth Menon
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