[U-Boot] [PATCH V2 8/9] configs: ti_omap3_common: Enable workaround for ARM errata 454179, 430973, 621766

From: Paul Kocialkowski <contact@paulk.fr>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH V2 8/9] configs: ti_omap3_common: Enable workaround for ARM errata 454179, 430973, 621766
Date: Wed, 25 Feb 2015 13:27:03 +0100	[thread overview]
Message-ID: <1424867223.2460.22.camel@collins> (raw)
In-Reply-To: <54EDB29E.80909@compulab.co.il>

Le mercredi 25 f?vrier 2015 ? 13:31 +0200, Igor Grinberg a ?crit :
> On 02/25/15 13:19, Paul Kocialkowski wrote:
> > Le mardi 24 f?vrier 2015 ? 16:57 -0600, Nishanth Menon a ?crit :
> >> Enable the OMAP3 specific errata code for 454179, 430973, 621766
> >> and while at it, remove legacy non-revision checked errata logic.
> >>
> >> Signed-off-by: Nishanth Menon <nm@ti.com>
> >> ---
> >>  arch/arm/cpu/armv7/omap3/board.c  |   16 ----------------
> >>  include/configs/ti_omap3_common.h |    6 ++++++
> >>  2 files changed, 6 insertions(+), 16 deletions(-)
> >>
> >> diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
> >> index 7ce30949a6c6..cc3a43341335 100644
> >> --- a/arch/arm/cpu/armv7/omap3/board.c
> >> +++ b/arch/arm/cpu/armv7/omap3/board.c
> >> @@ -35,7 +35,6 @@ DECLARE_GLOBAL_DATA_PTR;
> >>  
> >>  /* Declarations */
> >>  extern omap3_sysinfo sysinfo;
> >> -static void omap3_setup_aux_cr(void);
> >>  #ifndef CONFIG_SYS_L2CACHE_OFF
> >>  static void omap3_invalidate_l2_cache_secure(void);
> >>  #endif
> >> @@ -246,9 +245,6 @@ void s_init(void)
> >>  
> >>  	try_unlock_memory();
> >>  
> >> -	/* Errata workarounds */
> >> -	omap3_setup_aux_cr();
> >> -
> >>  #ifndef CONFIG_SYS_L2CACHE_OFF
> >>  	/* Invalidate L2-cache from secure mode */
> >>  	omap3_invalidate_l2_cache_secure();
> >> @@ -428,18 +424,6 @@ void omap3_update_aux_cr_secure(u32 set_bits, u32 clear_bits)
> >>  	}
> >>  }
> >>  
> >> -static void omap3_setup_aux_cr(void)
> >> -{
> >> -	/* Workaround for Cortex-A8 errata: #454179 #430973
> >> -	 *	Set "IBE" bit
> >> -	 *	Set "Disable Branch Size Mispredicts" bit
> >> -	 * Workaround for erratum #621766
> >> -	 *	Enable L1NEON bit
> >> -	 * ACR |= (IBE | DBSM | L1NEON) => ACR |= 0xE0
> >> -	 */
> >> -	omap3_update_aux_cr_secure(0xE0, 0);
> >> -}
> >> -
> >>  #ifndef CONFIG_SYS_L2CACHE_OFF
> >>  static void omap3_update_aux_cr(u32 set_bits, u32 clear_bits)
> >>  {
> >> diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h
> >> index f909f6b94a18..db15c12ddf53 100644
> >> --- a/include/configs/ti_omap3_common.h
> >> +++ b/include/configs/ti_omap3_common.h
> > 
> > Only a couple of OMAP3 boards in U-Boot include ti_omap3_common.h. You
> > can find a complete list of all the configs that need those options
> > enabled from my first patch on that topic:
> > http://lists.denx.de/pipermail/u-boot/2015-February/205809.html
> > 
> > I guess it's better to enable those on all the currently-supported omap3
> > platforms: that's the way it was so far and it won't hurt in cases it's
> > not needed thanks to the revision detection.
> 
> Or...
> I think this patch might be a good enough argument to request people
> switch to include ti_omap3_common.h instead of duplicating it in
> private configs...
> 
> Don't you think?

The way I see it, ti_omap3_common.h is common for OMAP3 boards made by
TI. A few things there are not generic to omap3 in general (e.g. not
every board uses the U-Boot SPL, or UART3 for console).

However, I agree it would be beneficial to have an omap3_common.h config
with the options that are expected to be shared accross every possible
omap3 device (and with a few clever ifdef so that the minimum has to be
set in the including board configs).

I could try to come up with such a config if you wish, but I'm afraid
I'm not the most qualified person to do this (I only have a single omap3
device).

> >> @@ -27,6 +27,12 @@
> >>  # define CONFIG_SYS_MALLOC_F_LEN	(1 << 10)
> >>  #endif
> >>  
> >> +/* Common ARM Erratas */
> >> +#define CONFIG_ARM_ARCH_CP15_ERRATA
> >> +#define CONFIG_ARM_ERRATA_454179
> >> +#define CONFIG_ARM_ERRATA_430973
> >> +#define CONFIG_ARM_ERRATA_621766
> >> +
> >>  /* The chip has SDRC controller */
> >>  #define CONFIG_SDRC
> >>  
> > 
> > 
> > 
> > _______________________________________________
> > U-Boot mailing list
> > U-Boot at lists.denx.de
> > http://lists.denx.de/mailman/listinfo/u-boot
> > 
> 

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