From mboxrd@z Thu Jan 1 00:00:00 1970 From: Scott Wood Date: Thu, 5 Mar 2015 11:08:03 -0600 Subject: [U-Boot] [U-Boot, 1/2, v4] powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P3041 In-Reply-To: <1425540416445.94572@freescale.com> References: <1424854076-10387-1-git-send-email-aneesh.bansal@freescale.com> <20150225221321.GA31902@home.buserror.net> <1425012715.4698.85.camel@freescale.com> <1425503433.4698.124.camel@freescale.com> <1425540416445.94572@freescale.com> Message-ID: <1425575283.4698.132.camel@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Thu, 2015-03-05 at 01:26 -0600, Bansal Aneesh-B39320 wrote: > > -----Original Message----- > > From: Wood Scott-B07421 > > Sent: Thursday, March 05, 2015 2:41 AM > > To: Bansal Aneesh-B39320 > > Cc: u-boot at lists.denx.de; Sun York-R58495; Gupta Ruchika-R66431 > > Subject: Re: [U-Boot, 1/2, v4] powerpc/mpc85xx: SECURE BOOT- NAND > > secure boot target for P3041 > > > > Where does the 3.5G limitation come from? Even if the physical address > > needs to be elsewhere due to bootrom constraints, we should be able to > > map it wherever we want in the TLB once U-Boot takes control. > > > The 3.5G limitation comes from BootROM in case of secure Boot. > Initially U-Boot has to run from CPC configured as SRAM with address > Within 3.5G. Once U-boot has relocated to DDR, we have removed the > Corresponding TLB entry. Again, you could relocate the virtual address of L3 much earlier. -Scott