From: Jagan Teki <jteki@openedev.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [U-Boot PATCH v2 11/17] dts: zynq: Add zynq spi controller nodes
Date: Sun, 10 May 2015 20:45:51 +0530 [thread overview]
Message-ID: <1431270957-6901-12-git-send-email-jteki@openedev.com> (raw)
In-Reply-To: <1431270957-6901-1-git-send-email-jteki@openedev.com>
This patch adds zynq spi controller nodes in zynq-7000.dtsi.
Signed-off-by: Jagan Teki <jteki@openedev.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
---
arch/arm/dts/zynq-7000.dtsi | 24 ++++++++++++++++++++++++
doc/device-tree-bindings/spi/spi-zynq.txt | 27 +++++++++++++++++++++++++++
2 files changed, 51 insertions(+)
create mode 100644 doc/device-tree-bindings/spi/spi-zynq.txt
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index 2d076f1..f66f8dc 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -109,6 +109,30 @@
interrupts = <0 50 4>;
};
+ spi0: spi at e0006000 {
+ compatible = "xlnx,zynq-spi";
+ reg = <0xe0006000 0x1000>;
+ status = "disabled";
+ interrupt-parent = <&intc>;
+ interrupts = <0 26 4>;
+ clocks = <&clkc 25>, <&clkc 34>;
+ clock-names = "ref_clk", "pclk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ spi1: spi at e0007000 {
+ compatible = "xlnx,zynq-spi";
+ reg = <0xe0007000 0x1000>;
+ status = "disabled";
+ interrupt-parent = <&intc>;
+ interrupts = <0 49 4>;
+ clocks = <&clkc 26>, <&clkc 35>;
+ clock-names = "ref_clk", "pclk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
gem0: ethernet at e000b000 {
compatible = "cdns,gem";
reg = <0xe000b000 0x4000>;
diff --git a/doc/device-tree-bindings/spi/spi-zynq.txt b/doc/device-tree-bindings/spi/spi-zynq.txt
new file mode 100644
index 0000000..a7c2757
--- /dev/null
+++ b/doc/device-tree-bindings/spi/spi-zynq.txt
@@ -0,0 +1,27 @@
+Zynq SPI controller Device Tree Bindings
+----------------------------------------
+
+Required properties:
+- compatible : Should be "xlnx,spi-zynq".
+- reg : Physical base address and size of SPI registers map.
+- status : Status will be disabled in dtsi and enabled in required dts.
+- interrupt-parent : Must be core interrupt controller.
+- interrupts : Property with a value describing the interrupt
+ number.
+- clocks : Clock phandles (see clock bindings for details).
+- clock-names : List of input clock names - "ref_clk", "pclk"
+ (See clock bindings for details).
+
+Example:
+
+ spi at e0006000 {
+ compatible = "xlnx,zynq-spi";
+ reg = <0xe0006000 0x1000>;
+ status = "disabled";
+ interrupt-parent = <&intc>;
+ interrupts = <0 26 4>;
+ clocks = <&clkc 25>, <&clkc 34>;
+ clock-names = "ref_clk", "pclk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ } ;
--
1.9.1
next prev parent reply other threads:[~2015-05-10 15:15 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-10 15:15 [U-Boot] [U-Boot PATCH v2 00/17] spi/sf: Cleansup and driver model conversions Jagan Teki
2015-05-10 15:15 ` [U-Boot] [U-Boot PATCH v2 01/17] spi: Zap andes_spi driver Jagan Teki
2015-05-10 15:15 ` [U-Boot] [U-Boot PATCH v2 02/17] spi: Zap ftssp010_spi driver Jagan Teki
2015-05-10 15:15 ` [U-Boot] [U-Boot PATCH v2 03/17] spi: Zap oc_tiny_spi driver Jagan Teki
2015-05-10 15:15 ` [U-Boot] [U-Boot PATCH v2 04/17] spi: xilinx_spi: Move header code to driver Jagan Teki
2015-05-10 15:15 ` [U-Boot] [U-Boot PATCH v2 05/17] spi: xilinx_spi: Driver clean-up Jagan Teki
2015-05-10 15:15 ` [U-Boot] [U-Boot PATCH v2 06/17] spi: davinci_spi: Move header code to driver Jagan Teki
2015-05-10 15:15 ` [U-Boot] [U-Boot PATCH v2 07/17] spi: davinci_spi: Driver cleanup Jagan Teki
2015-05-10 15:15 ` [U-Boot] [U-Boot PATCH v2 08/17] spi/sf: Minor cleanups Jagan Teki
2015-05-10 15:15 ` [U-Boot] [U-Boot PATCH v2 09/17] dm: spi: zynq_spi: Convert to driver model Jagan Teki
2015-05-10 15:15 ` [U-Boot] [U-Boot PATCH v2 10/17] zynq: Kconfig: Enable dm spi and spi_flash Jagan Teki
2015-05-10 15:15 ` Jagan Teki [this message]
2015-05-10 15:15 ` [U-Boot] [U-Boot PATCH v2 12/17] spi: zynq_spi: Add fdt support in driver Jagan Teki
2015-05-10 15:15 ` [U-Boot] [U-Boot PATCH v2 13/17] dts: zynq: Enable spi1 for zc770_xm010 board Jagan Teki
2015-06-16 11:28 ` Jagan Teki
2015-06-16 13:34 ` Michal Simek
2015-05-10 15:15 ` [U-Boot] [U-Boot PATCH v2 14/17] dm: spi: xilinx_spi: Convert to driver model Jagan Teki
2015-05-10 15:15 ` [U-Boot] [U-Boot PATCH v2 15/17] spi: xilinx_spi: Add asm/io.h include file Jagan Teki
2015-05-10 15:15 ` [U-Boot] [U-Boot PATCH v2 16/17] spi: Kconfig: Add Zynq QSPI controller entry Jagan Teki
2015-05-10 15:15 ` [U-Boot] [U-Boot PATCH v2 17/17] spi: Kconfig: Add Zynq SPI " Jagan Teki
2015-05-12 3:57 ` [U-Boot] [U-Boot PATCH v2 00/17] spi/sf: Cleansup and driver model conversions Jagan Teki
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1431270957-6901-12-git-send-email-jteki@openedev.com \
--to=jteki@openedev.com \
--cc=u-boot@lists.denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox