[U-Boot] [PATCH v2 3/5] spi/sf: Use BIT macro from linux/bitops.h

[Jagan Teki <jteki@openedev.com>]

Updated few places in spi/sf code.

Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
---
 drivers/mtd/spi/sf_internal.h | 28 ++++++++++++++--------------
 include/spi.h                 | 24 ++++++++++++------------
 2 files changed, 26 insertions(+), 26 deletions(-)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 02015d7..11f04c6 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -16,18 +16,18 @@
 /* Dual SPI flash memories - see SPI_COMM_DUAL_... */
 enum spi_dual_flash {
 	SF_SINGLE_FLASH	= 0,
-	SF_DUAL_STACKED_FLASH	= 1 << 0,
-	SF_DUAL_PARALLEL_FLASH	= 1 << 1,
+	SF_DUAL_STACKED_FLASH	= BIT(0),
+	SF_DUAL_PARALLEL_FLASH	= BIT(1),
 };
 
 /* Enum list - Full read commands */
 enum spi_read_cmds {
-	ARRAY_SLOW		= 1 << 0,
-	ARRAY_FAST		= 1 << 1,
-	DUAL_OUTPUT_FAST	= 1 << 2,
-	DUAL_IO_FAST		= 1 << 3,
-	QUAD_OUTPUT_FAST	= 1 << 4,
-	QUAD_IO_FAST		= 1 << 5,
+	ARRAY_SLOW		= BIT(0),
+	ARRAY_FAST		= BIT(1),
+	DUAL_OUTPUT_FAST	= BIT(2),
+	DUAL_IO_FAST		= BIT(3),
+	QUAD_OUTPUT_FAST	= BIT(4),
+	QUAD_IO_FAST		= BIT(5),
 };
 
 /* Normal - Extended - Full command set */
@@ -37,12 +37,12 @@ enum spi_read_cmds {
 
 /* sf param flags */
 enum {
-	SECT_4K		= 1 << 0,
-	SECT_32K	= 1 << 1,
-	E_FSR		= 1 << 2,
-	SST_BP		= 1 << 3,
-	SST_WP		= 1 << 4,
-	WR_QPP		= 1 << 5,
+	SECT_4K		= BIT(0),
+	SECT_32K	= BIT(1),
+	E_FSR		= BIT(2),
+	SST_BP		= BIT(3),
+	SST_WP		= BIT(4),
+	WR_QPP		= BIT(5),
 };
 
 #define SST_WR		(SST_BP | SST_WP)
diff --git a/include/spi.h b/include/spi.h
index 7e42647..c8cf01b 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -11,24 +11,24 @@
 #define _SPI_H_
 
 /* SPI mode flags */
-#define	SPI_CPHA	0x01			/* clock phase */
-#define	SPI_CPOL	0x02			/* clock polarity */
+#define	SPI_CPHA	BIT(0)			/* clock phase */
+#define	SPI_CPOL	BIT(1)			/* clock polarity */
 #define	SPI_MODE_0	(0|0)			/* (original MicroWire) */
 #define	SPI_MODE_1	(0|SPI_CPHA)
 #define	SPI_MODE_2	(SPI_CPOL|0)
 #define	SPI_MODE_3	(SPI_CPOL|SPI_CPHA)
-#define	SPI_CS_HIGH	0x04			/* CS active high */
-#define	SPI_LSB_FIRST	0x08			/* per-word bits-on-wire */
-#define	SPI_3WIRE	0x10			/* SI/SO signals shared */
-#define	SPI_LOOP	0x20			/* loopback mode */
-#define	SPI_SLAVE	0x40			/* slave mode */
-#define	SPI_PREAMBLE	0x80			/* Skip preamble bytes */
+#define	SPI_CS_HIGH	BIT(2)			/* CS active high */
+#define	SPI_LSB_FIRST	BIT(3)			/* per-word bits-on-wire */
+#define	SPI_3WIRE	BIT(4)			/* SI/SO signals shared */
+#define	SPI_LOOP	BIT(5)			/* loopback mode */
+#define	SPI_SLAVE	BIT(6)			/* slave mode */
+#define	SPI_PREAMBLE	BIT(7)			/* Skip preamble bytes */
 
 /* SPI transfer flags */
-#define SPI_XFER_BEGIN		0x01	/* Assert CS before transfer */
-#define SPI_XFER_END		0x02	/* Deassert CS after transfer */
-#define SPI_XFER_MMAP		0x08	/* Memory Mapped start */
-#define SPI_XFER_MMAP_END	0x10	/* Memory Mapped End */
+#define SPI_XFER_BEGIN		BIT(0)	/* Assert CS before transfer */
+#define SPI_XFER_END		BIT(1)	/* Deassert CS after transfer */
+#define SPI_XFER_MMAP		BIT(3)	/* Memory Mapped start */
+#define SPI_XFER_MMAP_END	BIT(4)	/* Memory Mapped End */
 #define SPI_XFER_ONCE		(SPI_XFER_BEGIN | SPI_XFER_END)
 #define SPI_XFER_U_PAGE	BIT(5)
 
-- 
1.9.1