From: Chin Liang See <clsee@altera.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCHv4 1/3] driver/ddr/altera: Add DDR driver for Altera's SDRAM controller
Date: Mon, 22 Jun 2015 04:38:38 -0500 [thread overview]
Message-ID: <1434965918.2855.3.camel@clsee-VirtualBox.altera.com> (raw)
In-Reply-To: <55770B96.5010002@gmail.com>
Hi,
On Tue, 2015-06-09 at 10:51 -0500, Dinh Nguyen wrote:
>
> On 6/9/15 6:55 AM, Pavel Machek wrote:
> > Hi!
> >
> >> +struct sdram_prot_rule {
> >> + uint64_t sdram_start; /* SDRAM start address */
> >> + uint64_t sdram_end; /* SDRAM end address */
> >> + uint32_t rule; /* SDRAM protection rule number: 0-19 */
> >> + int valid; /* Rule valid or not? 1 - valid, 0 not*/
> >
> > There should be space before "*/".
> >
>
> Ok...
>
> >> diff --git a/arch/arm/include/asm/arch-socfpga/sdram_config.h b/arch/arm/include/asm/arch-socfpga/sdram_config.h
> >> new file mode 100644
> >> index 0000000..f6d51ca
> >> --- /dev/null
> >> +++ b/arch/arm/include/asm/arch-socfpga/sdram_config.h
> >> @@ -0,0 +1,100 @@
> >> +/*
> >> + * Copyright Altera Corporation (C) 2012-2015
> >> + *
> >> + * SPDX-License-Identifier: BSD-3-Clause
> >> + */
> >> +
> >> +/* This file is autogenerated from tools provided by Altera.*/
> >
> > Here too.
> >
>
> Ok...
>
> >> +#endif /*#ifndef__SDRAM_CONFIG_H*/
> >
> > You should not need to comment for include guards... (and comment
> > style).
> >
> >> +static int compute_errata_rows(unsigned long long memsize, int cs, int width,
> >> + int rows, int banks, int cols)
> >> +{
> >
> > Comment what kind of errata this is working around?
> >
>
> I'll have to ask around.
It is to workaround the computational of SDRAM rows. The info is then
used to calculate the SDRAM size. By doing this, we can remove from
hardcoding the SDRAM size into the code. More info at
https://github.com/altera-opensource/u-boot-socfpga/commit/93815696dce132ff8abc4ab2f4c195339ff821a0. Hope this explains.
>
> >
> >> +#if defined(CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS) && \
> >> +defined(CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS) && \
> >> +defined(CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS) && \
> >> +defined(CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS) && \
> >> +defined(CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS)
> >> +
> >
> > Hmm? Is this really neccessary? Is it valid to provide configuration
> > w/o those defines?
> >
>
> These defines are necessary as I want to keep some level of continuity
> with the Altera tools that generates these config files to this.
>
>
> >> + writel(CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS,
> >> + &sysmgr_regs->iswgrp_handoff[4]);
> >> +#endif
> >
> >> +
> >> + /* Restore the SDR PHY Register if valid */
> >> + if (sdr_phy_reg != 0xffffffff)
> >> + writel(sdr_phy_reg, &sdr_ctrl->phy_ctrl0);
> >> +
> >> +/***** Final step - apply configuration changes *****/
> >
> > Comment style...
> >
>
> Ok..
>
> >> +/*
> >> + * To calculate SDRAM device size based on SDRAM controller parameters.
> >> + * Size is specified in bytes.
> >> + *
> >> + * NOTE:
> >> + * This function is compiled and linked into the preloader and
> >> + * Uboot (there may be others). So if this function changes, the Preloader
> >> + * and UBoot must be updated simultaneously.
> >> + */
> >> +unsigned long sdram_calculate_size(void)
> >> +{
> >> + unsigned long temp;
> >> + unsigned long row, bank, col, cs, width;
> >> +
> >> + temp = readl(&sdr_ctrl->dram_addrw);
> >> + col = (temp & SDR_CTRLGRP_DRAMADDRW_COLBITS_MASK) >>
> >> + SDR_CTRLGRP_DRAMADDRW_COLBITS_LSB;
> >> +
> >> + /* SDRAM Failure When Accessing Non-Existent Memory
> >> + * Use ROWBITS from Quartus/QSys to calculate SDRAM size
> >> + * since the FB specifies we modify ROWBITs to work around SDRAM
> >> + * controller issue.
> >> + *
> >> + * If the stored handoff value for rows is 0, it probably means
> >> + * the preloader is older than UBoot. Use the
> >> + * #define from the SOCEDS Tools per Crucible review
> >> + * uboot-socfpga-204. Note that this is not a supported
> >> + * configuration and is not tested. The customer
> >> + * should be using preloader and uboot built from the
> >> + * same tag.
> >> + */
> >
> > U-Boot is normally spelled "U-Boot". You have two different variants
> > in comments here.
>
> Thanks for the comment here, and will be more cognizant in the future on
> this fact.
>
> >
> > Second part of the comment is probably not relevant any more....?
> >
>
> removed...
>
> > Acked-by: Pavel Machek <pavel@denx.de>
> > Pavel
>
> Thanks,
>
> Dinh
next prev parent reply other threads:[~2015-06-22 9:38 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-03 3:52 [U-Boot] [PATCHv4 0/3] drivers/ddr/altera: Add the DDR controller driver for SoCFPGA dinguyen at opensource.altera.com
2015-06-03 3:52 ` [U-Boot] [PATCHv4 1/3] driver/ddr/altera: Add DDR driver for Altera's SDRAM controller dinguyen at opensource.altera.com
2015-06-09 11:55 ` Pavel Machek
2015-06-09 12:58 ` Wolfgang Denk
2015-06-09 15:51 ` Dinh Nguyen
2015-06-22 9:38 ` Chin Liang See [this message]
2015-06-22 10:56 ` Pavel Machek
2015-06-03 3:52 ` [U-Boot] [PATCHv4 2/3] driver/ddr/altera: Add the sdram calibration portion dinguyen at opensource.altera.com
2015-06-09 12:21 ` Pavel Machek
2015-06-03 3:52 ` [U-Boot] [PATCHv4 3/3] arm: socfpga: enable the Altera SDRAM controller driver dinguyen at opensource.altera.com
2015-06-09 12:25 ` Pavel Machek
2015-06-26 16:43 ` [U-Boot] [PATCHv4 0/3] drivers/ddr/altera: Add the DDR controller driver for SoCFPGA Marek Vasut
2015-06-26 20:01 ` Marek Vasut
2015-07-12 19:50 ` Marek Vasut
2015-07-17 19:58 ` Dinh Nguyen
2015-07-17 20:22 ` Marek Vasut
2015-07-18 23:51 ` Marek Vasut
2015-07-20 13:40 ` Dinh Nguyen
2015-07-20 18:36 ` Marek Vasut
2015-07-20 19:31 ` Dinh Nguyen
2015-07-20 19:40 ` Marek Vasut
2015-07-21 22:46 ` Dinh Nguyen
2015-07-22 3:24 ` Marek Vasut
2015-07-23 18:29 ` Dinh Nguyen
2015-07-24 3:57 ` Marek Vasut
2015-07-22 8:27 ` Dinh Nguyen
2015-07-22 9:00 ` Marek Vasut
2015-07-22 12:57 ` Dinh Nguyen
2015-07-22 13:01 ` Marek Vasut
2015-07-23 4:03 ` Dinh Nguyen
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