From mboxrd@z Thu Jan  1 00:00:00 1970
From: Scott Wood <scottwood@freescale.com>
Date: Thu, 16 Jul 2015 15:20:52 -0500
Subject: [U-Boot] [PATCH 2/4] nand: lpc32xx: add SLC NAND controller
	support
In-Reply-To: <1437003228-14746-3-git-send-email-vz@mleia.com>
References: <1437003228-14746-1-git-send-email-vz@mleia.com>
 <1437003228-14746-3-git-send-email-vz@mleia.com>
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To: u-boot@lists.denx.de

On Thu, 2015-07-16 at 02:33 +0300, Vladimir Zapolskiy wrote:
> +static void lpc32xx_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
> +{
> +     while (len-- > 0)
> +             *buf++ = (uint8_t)readl(&lpc32xx_nand_slc_registers->data);
> +}
> +
> +static uint8_t lpc32xx_read_byte(struct mtd_info *mtd)
> +{
> +     return (uint8_t)readl(&lpc32xx_nand_slc_registers->data);
> +}
> +
> +static void lpc32xx_write_buf(struct mtd_info *mtd, const uint8_t *buf, 
> int len)
> +{
> +     while (len-- > 0)
> +             writel((uint32_t)*buf++, &lpc32xx_nand_slc_registers->data);
> +}
> +
> +static void lpc32xx_write_byte(struct mtd_info *mtd, uint8_t byte)
> +{
> +     writel((uint32_t)byte, &lpc32xx_nand_slc_registers->data);
> +}

Unnecessary casts.

> +     /*
> +      * Hardware ECC calculation is not supported by the driver, because it
> +      * requires DMA support, see Note after SLC_ECC register description
> +      */
> +     lpc32xx_chip->ecc.mode  = NAND_ECC_SOFT;

Where can I find this note?  I don't see any  "SLC_ECC register description".

> +#if defined(CONFIG_SPL_BUILD)
> +     lpc32xx_chip->options           |= NAND_SKIP_BBTSCAN;
> +#endif

Does this make any difference?  nand_spl_simple will not do a bbt scan in any 
case.

-Scott