From: Stefan Roese <sr@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 02/10] arm: mvebu: Change MBUS base addresses and sizes
Date: Thu, 23 Jul 2015 10:26:12 +0200 [thread overview]
Message-ID: <1437639980-16286-2-git-send-email-sr@denx.de> (raw)
In-Reply-To: <1437639980-16286-1-git-send-email-sr@denx.de>
This patch changes the MBUS base addresses and sizes to use more
generic names and also adds defines for the sizes. It also moves
the base address to higher addresses.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
---
arch/arm/mach-mvebu/cpu.c | 14 ++++++++------
arch/arm/mach-mvebu/include/mach/cpu.h | 12 ++++++++----
2 files changed, 16 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index 9496d5f..7335620 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -19,18 +19,20 @@
static struct mbus_win windows[] = {
/* PCIE MEM address space */
- { DEFADR_PCI_MEM, 256 << 20, CPU_TARGET_PCIE13, CPU_ATTR_PCIE_MEM },
+ { MBUS_PCI_MEM_BASE, MBUS_PCI_MEM_SIZE,
+ CPU_TARGET_PCIE13, CPU_ATTR_PCIE_MEM },
/* PCIE IO address space */
- { DEFADR_PCI_IO, 64 << 10, CPU_TARGET_PCIE13, CPU_ATTR_PCIE_IO },
+ { MBUS_PCI_IO_BASE, MBUS_PCI_IO_SIZE,
+ CPU_TARGET_PCIE13, CPU_ATTR_PCIE_IO },
/* SPI */
- { DEFADR_SPIF, 8 << 20, CPU_TARGET_DEVICEBUS_BOOTROM_SPI,
- CPU_ATTR_SPIFLASH },
+ { MBUS_SPI_BASE, MBUS_SPI_SIZE,
+ CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_SPIFLASH },
/* NOR */
- { DEFADR_BOOTROM, 8 << 20, CPU_TARGET_DEVICEBUS_BOOTROM_SPI,
- CPU_ATTR_BOOTROM },
+ { MBUS_BOOTROM_BASE, MBUS_BOOTROM_SIZE,
+ CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_BOOTROM },
};
void reset_cpu(unsigned long ignored)
diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h
index 8bcdef6..674fdaa 100644
--- a/arch/arm/mach-mvebu/include/mach/cpu.h
+++ b/arch/arm/mach-mvebu/include/mach/cpu.h
@@ -65,10 +65,14 @@ enum {
/*
* Default Device Address MAP BAR values
*/
-#define DEFADR_PCI_MEM 0x90000000
-#define DEFADR_PCI_IO 0xC0000000
-#define DEFADR_SPIF 0xF4000000
-#define DEFADR_BOOTROM 0xF8000000
+#define MBUS_PCI_MEM_BASE 0xE8000000
+#define MBUS_PCI_MEM_SIZE (128 << 20)
+#define MBUS_PCI_IO_BASE 0xF1100000
+#define MBUS_PCI_IO_SIZE (64 << 10)
+#define MBUS_SPI_BASE 0xF4000000
+#define MBUS_SPI_SIZE (8 << 20)
+#define MBUS_BOOTROM_BASE 0xF8000000
+#define MBUS_BOOTROM_SIZE (8 << 20)
struct mbus_win {
u32 base;
--
2.4.6
next prev parent reply other threads:[~2015-07-23 8:26 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-23 8:26 [U-Boot] [PATCH 01/10] arm: marvell: Increase MAXARGS to 32 Stefan Roese
2015-07-23 8:26 ` Stefan Roese [this message]
2015-07-23 8:26 ` [U-Boot] [PATCH 03/10] arm: mvebu: Setup the MBUS bridge registers Stefan Roese
2015-07-23 8:26 ` [U-Boot] [PATCH 04/10] arm: mvebu: Flush caches and disable MMU only on A38x Stefan Roese
2015-07-23 8:26 ` [U-Boot] [PATCH 05/10] arm: mvebu: Disable MBUS error propagation Stefan Roese
2015-07-23 8:26 ` [U-Boot] [PATCH 06/10] mtd: nand: Add mvebu (PXA / AXP / A38x) NAND device driver Stefan Roese
2015-07-23 8:26 ` [U-Boot] [PATCH 07/10] arm: mvebu: Enable NAND controller on MVEBU SoC's Stefan Roese
2015-07-23 8:26 ` [U-Boot] [PATCH 08/10] arm: mvebu: Enable NAND on db-mv784mp-gp Stefan Roese
2015-07-23 8:26 ` [U-Boot] [PATCH 09/10] arm: mvebu: Enable USB EHCI support on Armada XP Stefan Roese
2015-07-23 8:38 ` Marek Vasut
2015-07-23 8:26 ` [U-Boot] [PATCH 10/10] arm: mvebu: db-mv785mp-gp: Add USB/EHCI support Stefan Roese
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