From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marcel Ziswiler Date: Wed, 5 Aug 2015 15:33:24 +0000 Subject: [U-Boot] [PATCH] tegra: pll: fix pllx cpcon in pllinfo table for t20/t30 In-Reply-To: <9ef4629ac06341f18ec85cadd0addbad@HQMAIL104.nvidia.com> References: <03d4d3a5c54263f194e72047906b61affba824c1.1438785025.git.marcel.ziswiler@toradex.com> <9ef4629ac06341f18ec85cadd0addbad@HQMAIL104.nvidia.com> Message-ID: <1438788802.2747.12.camel@toradex.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Wed, 2015-08-05 at 15:23 +0000, Tom Warren wrote: > Do you mind if I just roll this into my pllinfo patch when I apply it > to u-boot-tegra/master and send the PR? I'll be sure to credit your > work! Fine with me and no need for any further credits. Thanks Tom. BTW: We are currently planning our ELCE trip to Dublin. Will any of you NVIDIA open-source maintainers make it there as well (e.g. to the U -Boot Summit)?