[U-Boot] [PATCH v2 2/2] arm: socfpga: config: Remove hard-coded drvsel and smpsel

[Chin Liang See <clsee@altera.com>]

Hi guys,

Any comment or ack for this patch?
Thanks

Chin Liang


On Thu, 2015-08-20 at 02:18 -0500, Chin Liang See wrote:
> Remove hard-coded SDMMC timing parameter drvsel and smplsel.
> This setting now will come from SDMMC calibration
> 
> Signed-off-by: Chin Liang See <clsee@altera.com>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> Cc: Pavel Machek <pavel@denx.de>
> Cc: Marek Vasut <marex@denx.de>
> Cc: Stefan Roese <sr@denx.de>
> ---
> Changes for v2
> - Update the CC list
> ---
>  include/configs/socfpga_common.h |    2 --
>  1 files changed, 0 insertions(+), 2 deletions(-)
> 
> diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
> index c64c7ed..1a070fd 100644
> --- a/include/configs/socfpga_common.h
> +++ b/include/configs/socfpga_common.h
> @@ -155,8 +155,6 @@
>  #define CONFIG_DWMMC
>  #define CONFIG_SOCFPGA_DWMMC
>  #define CONFIG_SOCFPGA_DWMMC_FIFO_DEPTH	1024
> -#define CONFIG_SOCFPGA_DWMMC_DRVSEL	3
> -#define CONFIG_SOCFPGA_DWMMC_SMPSEL	0
>  /* FIXME */
>  /* using smaller max blk cnt to avoid flooding the limited stack we have */
>  #define CONFIG_SYS_MMC_MAX_BLK_COUNT	256	/* FIXME -- SPL only? */