[U-Boot] [PATCH 1/2] arm: socfpga: mmc: Enable calibration for drvsel and smpsel

Dinh Nguyen
2015-08-21T00:33:56Z

On 8/20/15 4:59 PM, Marek Vasut wrote:
> On Thursday, August 20, 2015 at 11:55:02 PM, Dinh Nguyen wrote:
>> +CC: Simon Glass
>
> Hi Dinh,
>
>> On Thu, Aug 20, 2015 at 12:32 AM, Marek Vasut <marex@denx.de> wrote:
>>> On Thursday, August 20, 2015 at 07:28:02 AM, Chin Liang See wrote:
>>>> Hi,
>>>>
>>>> On Wed, 2015-08-19 at 14:36 +0000, marex at denx.de wrote:
>>>>> On Wednesday, August 19, 2015 at 10:21:17 AM, Chin Liang See wrote:
>>>>>> Hi,
>>>>>
>>>>> Hi again,
>>>>>
>>>>>> On Wed, 2015-08-19 at 02:41 +0000, marex at denx.de wrote:
>>>>>>> On Wednesday, August 19, 2015 at 07:54:50 AM, Chin Liang See wrote:
>>>>>>>> Enable SDMMC calibration to determine the best setting for
>>>>>>>> drvsel and smpsel. It will be triggered whenever there is
>>>>>>>> a change of card frequency and bus width. This is to ensure
>>>>>>>> reliable transmission between the controller and the card.
>>>>>>>>
>>>>>>>> Signed-off-by: Chin Liang See <clsee@altera.com>
>>>>>>>> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
>>
>> I think there's something wrong with your git scripts, I did not get this
>> email.
>
> You're not getting quite a lot of email I think. Could it be that altera
> has some issues with their mail system after some 300 patches went through
> your mailbox ? You sure you're not being filtered ? :b
>

I would not be surprised if I was, but I don't think I am. Since I
explicitly included my email address in the CC line on my earlier
response, I am seeing the mail just fine now. My opensource.altera.com
address was not even in the cc address line at all in any of the earlier
emails.

Dinh