From: Jagan Teki <jteki@openedev.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v5 13/16] spi: Kconfig: Add Zynq QSPI controller entry
Date: Fri, 4 Sep 2015 13:03:33 +0530 [thread overview]
Message-ID: <1441352013-7510-2-git-send-email-jteki@openedev.com> (raw)
In-Reply-To: <1441352013-7510-1-git-send-email-jteki@openedev.com>
Add Zynq QSPI controller Kconfig entry.
Signed-off-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
---
Changes for v2. v3, v4:
- none
Changes for v5:
- Remove TARGET_XILINX_ZYNQMP
drivers/spi/Kconfig | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 8e04fce..0692419 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -131,6 +131,15 @@ config ZYNQ_SPI
access the SPI NOR flash on platforms embedding this Zynq
SPI IP core.
+config ZYNQ_QSPI
+ bool "Zynq QSPI driver"
+ depends on ARCH_ZYNQ
+ help
+ Enable the Zynq Quad-SPI (QSPI) driver. This driver can be
+ used to access the SPI NOR flash on platforms embedding this
+ Zynq QSPI IP core. This IP is used to connect the flash in
+ 4-bit qspi, 8-bit dual stacked and shared 4-bit dual parallel.
+
endif # if DM_SPI
config FSL_ESPI
--
1.9.1
next prev parent reply other threads:[~2015-09-04 7:33 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-04 7:33 [U-Boot] [PATCH v5 07/16] dts: zc770-xm010: Enable zynq qspi controller node Jagan Teki
2015-09-04 7:33 ` Jagan Teki [this message]
2015-09-04 7:46 ` [U-Boot] [PATCH v5 13/16] spi: Kconfig: Add Zynq QSPI controller entry Michal Simek
2015-09-04 12:34 ` Jagan Teki
2015-09-04 7:46 ` [U-Boot] [PATCH v5 07/16] dts: zc770-xm010: Enable zynq qspi controller node Michal Simek
2015-09-04 12:34 ` Jagan Teki
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