From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chin Liang See Date: Fri, 18 Dec 2015 16:47:01 +0800 Subject: [U-Boot] [PATCH v2] arm: socfpga: Fix QSPI doesn't work on socdk board In-Reply-To: <1450428202-32613-1-git-send-email-shengjiangwu@icloud.com> References: <1450428202-32613-1-git-send-email-shengjiangwu@icloud.com> Message-ID: <1450428421.1881.7.camel@altera.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Shangjiang On Fri, 2015-12-18 at 16:43 +0800, shengjiangwu wrote: > Updated pinmux group MIXED1IO[15-20] for QSPI. > Updated QSPI clock. > > Signed-off-by: shengjiangwu > Cc: Chin Liang See > Cc: Dinh Nguyen > Cc: Dinh Nguyen > Cc: Pavel Machek > Cc: Marek Vasut > Cc: Stefan Roese > --- > Changes for v2: > - fixed wrong perpll for QSPI > --- > board/altera/cyclone5-socdk/qts/pll_config.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > I believe you forget to put back the pinmux change here. Thanks Chin Liang > diff --git a/board/altera/cyclone5-socdk/qts/pll_config.h > b/board/altera/cyclone5-socdk/qts/pll_config.h > index 5b754ac..4abd2e0 100644 > --- a/board/altera/cyclone5-socdk/qts/pll_config.h > +++ b/board/altera/cyclone5-socdk/qts/pll_config.h > @@ -32,7 +32,7 @@ > #define CONFIG_HPS_PERPLLGRP_VCO_PSRC 0 > #define CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT 3 > #define CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT 3 > -#define CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT 1 > +#define CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT 511 > #define CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT 4 > #define CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT 4 > #define CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT 511