From mboxrd@z Thu Jan 1 00:00:00 1970 From: Peng Fan Date: Tue, 22 Dec 2015 17:03:55 +0800 Subject: [U-Boot] [PATCH] imx: mx6sxsabresd: support emmc Message-ID: <1450775035-2339-1-git-send-email-van.freenix@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de From: Peng Fan For i.MX6SX SABRESD, USDHC4 can be used for SD and EMMC, default it is used for SD. This patch introduces EMMC pinmux settings and a new macro CONFIG_MX6SXSABRESD_EMMC_REWORK. If the board has been reworked to support emmc, need to enable this macro. Signed-off-by: Peng Fan Cc: Stefano Babic --- board/freescale/mx6sxsabresd/mx6sxsabresd.c | 32 +++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c b/board/freescale/mx6sxsabresd/mx6sxsabresd.c index 78f0151..6168b26 100644 --- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c +++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c @@ -109,6 +109,20 @@ static iomux_v3_cfg_t const usdhc4_pads[] = { MX6_PAD_SD4_DATA7__GPIO6_IO_21 | MUX_PAD_CTRL(NO_PAD_CTRL), }; +static iomux_v3_cfg_t const usdhc4_emmc_pads[] = { + MX6_PAD_SD4_CLK__USDHC4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_CMD__USDHC4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DATA0__USDHC4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DATA1__USDHC4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DATA2__USDHC4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DATA3__USDHC4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DATA4__USDHC4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DATA5__USDHC4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DATA6__USDHC4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DATA7__USDHC4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_RESET_B__USDHC4_RESET_B | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + static iomux_v3_cfg_t const fec1_pads[] = { MX6_PAD_ENET1_MDC__ENET1_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), MX6_PAD_ENET1_MDIO__ENET1_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), @@ -302,7 +316,11 @@ int board_early_init_f(void) static struct fsl_esdhc_cfg usdhc_cfg[3] = { {USDHC2_BASE_ADDR, 0, 4}, {USDHC3_BASE_ADDR}, +#ifdef CONFIG_MX6SXSABRESD_EMMC_REWORK + {USDHC4_BASE_ADDR, 0, 8}, +#else {USDHC4_BASE_ADDR}, +#endif }; #define USDHC3_CD_GPIO IMX_GPIO_NR(2, 10) @@ -327,7 +345,11 @@ int board_mmc_getcd(struct mmc *mmc) ret = !gpio_get_value(USDHC3_CD_GPIO); break; case USDHC4_BASE_ADDR: +#ifdef CONFIG_MX6SXSABRESD_EMMC_REWORK + ret = 1; +#else ret = !gpio_get_value(USDHC4_CD_GPIO); +#endif break; } @@ -361,9 +383,14 @@ int board_mmc_init(bd_t *bis) usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); break; case 2: +#ifdef CONFIG_MX6SXSABRESD_EMMC_REWORK + imx_iomux_v3_setup_multiple_pads( + usdhc4_emmc_pads, ARRAY_SIZE(usdhc4_emmc_pads)); +#else imx_iomux_v3_setup_multiple_pads( usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); gpio_direction_input(USDHC4_CD_GPIO); +#endif usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); break; default: @@ -410,9 +437,14 @@ int board_mmc_init(bd_t *bis) usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR; break; case 3: +#ifdef CONFIG_MX6SXSABRESD_EMMC_REWORK + imx_iomux_v3_setup_multiple_pads( + usdhc4_emmc_pads, ARRAY_SIZE(usdhc4_emmc_pads)); +#else imx_iomux_v3_setup_multiple_pads( usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); gpio_direction_input(USDHC4_CD_GPIO); +#endif usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); usdhc_cfg[0].esdhc_base = USDHC4_BASE_ADDR; break; -- 2.6.2