From: Stuart Yoder <stuart.yoder@nxp.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 4/5 v6] pci/layerscape: add defines for LUT
Date: Thu, 10 Mar 2016 10:52:24 -0600 [thread overview]
Message-ID: <1457628744-25865-1-git-send-email-stuart.yoder@nxp.com> (raw)
From: Stuart Yoder <stuart.yoder@nxp.com>
The per-PCI controller LUT (Look-Up-Table) is a 32-entry table
that maps PCI requester IDs (bus/dev/fun) to a stream ID.
Add defines for the register offsets.
Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com>
---
-v6: first version of this patch, just add the LUT #defines
.../include/asm/arch-fsl-layerscape/immap_lsch3.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index 91f3ce8..d04e336 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -86,6 +86,10 @@
#define PCIE_LUT_BASE 0x80000
#define PCIE_LUT_LCTRL0 0x7F8
#define PCIE_LUT_DBG 0x7FC
+#define PCIE_LUT_UDR(n) (0x800 + (n) * 8)
+#define PCIE_LUT_LDR(n) (0x804 + (n) * 8)
+#define PCIE_LUT_ENABLE (1 << 31)
+#define PCIE_LUT_ENTRY_COUNT 32
/* Device Configuration */
#define DCFG_BASE 0x01e00000
--
1.7.9.5
next reply other threads:[~2016-03-10 16:52 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-10 16:52 Stuart Yoder [this message]
2016-03-22 15:39 ` [U-Boot] [PATCH 4/5 v6] pci/layerscape: add defines for LUT york sun
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