From mboxrd@z Thu Jan 1 00:00:00 1970 From: Enric Balletbo i Serra Date: Tue, 3 May 2016 08:59:24 +0200 Subject: [U-Boot] [PATCH] igep00x0: Use the SRAM available for SPL. Message-ID: <1462258764-3911-1-git-send-email-eballetbo@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de From: Enric Balletbo i Serra Move CONFIG_SPL_TEXT_BASE down to 0x40200000 and set CONFIG_SPL_MAX_SIZE to (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE), so that it's clear what the limit is. This will also help some compilers to fit all the code into the allocated space. Signed-off-by: Enric Balletbo i Serra --- include/configs/omap3_igep00x0.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h index 5da50a5..9bd8915 100644 --- a/include/configs/omap3_igep00x0.h +++ b/include/configs/omap3_igep00x0.h @@ -19,6 +19,13 @@ #include #include +/* SRAM starts at 0x40200000 and ends at 0x4020FFFF (64KB) */ +#undef CONFIG_SPL_MAX_SIZE +#undef CONFIG_SPL_TEXT_BASE + +#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE) +#define CONFIG_SPL_TEXT_BASE 0x40200000 + /* * Display CPU and Board information */ -- 2.1.0