From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?q?Andreas=20Bie=C3=9Fmann?= Date: Mon, 13 Jun 2016 00:01:26 +0200 Subject: [U-Boot] [U-Boot, v2, 06/18] net: macb: Flush correct cache portion when sending In-Reply-To: <1462454902-6093-7-git-send-email-sjg@chromium.org> (from Simon Glass on Thu, 5 May 2016 07:28:10 -0600) References: <1462454902-6093-7-git-send-email-sjg@chromium.org> Message-ID: <1465768886-7225-1-git-send-email-andreas@biessmann.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Dear Simon Glass, Simon Glass writes: >The end address of the cache flush must be cache-line-aligned since >otherwise (at least on ARM926-EJS) the request is ignored. When the cache >is enabled this means that packets are not sent. > >Signed-off-by: Simon Glass >Reviewed-by: Heiko Schocher >Acked-by: Joe Hershberger >Reviewed-by: Andreas Bie?mann >--- > >Changes in v2: None > > drivers/net/macb.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) applied to u-boot-atmel/master, thanks! Best regards, Andreas Bie?mann