From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chin Liang See Date: Sun, 7 Aug 2016 21:59:19 +0800 Subject: [U-Boot] [PATCH] arm: socfpga: stratix10: Add SOCFPGA Stratix10 base address In-Reply-To: References: <1470237427-2176-1-git-send-email-clsee@altera.com> <1470323281.2136.3.camel@altera.com> <65427aa1-03c9-ef71-0077-a82c8994b080@denx.de> <1470324736.2136.11.camel@altera.com> Message-ID: <1470578359.2069.1.camel@altera.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Thu, 2016-08-04 at 17:50 +0200, Marek Vasut wrote: > On 08/04/2016 05:32 PM, Chin Liang See wrote: > > On Thu, 2016-08-04 at 17:27 +0200, Marek Vasut wrote: > > > On 08/04/2016 05:08 PM, Chin Liang See wrote: > > > > Hi Marek, > > > > > > Hi, > > > > > > > On Thu, 2016-08-04 at 07:34 +0200, Marek Vasut wrote: > > > > > On 08/03/2016 05:17 PM, Chin Liang See wrote: > > > > > > Add base address header file for Stratix10 SoC > > > > > > > > > > > > Signed-off-by: Chin Liang See > > > > > > Cc: Marek Vasut > > > > > > Cc: Dinh Nguyen > > > > > > Cc: Ley Foon Tan > > > > > > > > > > Applied to the 01-arria10 branch , since this patch is > > > > > useless in > > > > > mainline as-is . > > > > > > > > Cool and thanks. This is the patch for S10 SOCVP and I am > > > > validating my > > > > development code now. > > > > > > > > Can we split this as another branch? Once its working with S10 > > > > SOCVP, > > > > this shall be part of mainline. > > > > > > I can put it into stratix branch, but I don't want to add it into > > > mainline as it's dead code for now. > > > > Cool and yah, we shall do it once its running on SOCVP. Let us know > > if > > you wish to play with it too. > > I have enough stuff to play with for now, is the SoCVP documented > somewhere already in case I got bored ? A good source of reference is located at https://www.altera.com/en_US/pdfs/literature/ug/ug-s10-vp.pdf Have fun :) Chin Liang