From: Chin Liang See <clsee@altera.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 01/11] arm: socfpga: stratix10: Add SOCFPGA Stratix10 base address
Date: Mon, 22 Aug 2016 23:02:33 +0800 [thread overview]
Message-ID: <1471878163-3598-2-git-send-email-clsee@altera.com> (raw)
In-Reply-To: <1471878163-3598-1-git-send-email-clsee@altera.com>
Add base address header file for Stratix10 SoC
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Ley Foon Tan <lftan@altera.com>
---
arch/arm/mach-socfpga/include/mach/base_addr_s10.h | 48 ++++++++++++++++++++++
1 file changed, 48 insertions(+)
create mode 100755 arch/arm/mach-socfpga/include/mach/base_addr_s10.h
diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_s10.h b/arch/arm/mach-socfpga/include/mach/base_addr_s10.h
new file mode 100755
index 0000000..cd29a59
--- /dev/null
+++ b/arch/arm/mach-socfpga/include/mach/base_addr_s10.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2016, Intel Corporation
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#ifndef _SOCFPGA_S10_BASE_HARDWARE_H_
+#define _SOCFPGA_S10_BASE_HARDWARE_H_
+
+#define SOCFPGA_SMMU_ADDRESS 0xfa000000
+#define SOCFPGA_EMAC0_ADDRESS 0xff800000
+#define SOCFPGA_EMAC1_ADDRESS 0xff802000
+#define SOCFPGA_EMAC2_ADDRESS 0xff804000
+#define SOCFPGA_SDMMC_ADDRESS 0xff808000
+#define SOCFPGA_USB0_ADDRESS 0xffb00000
+#define SOCFPGA_USB1_ADDRESS 0xffb40000
+#define SOCFPGA_NANDREGS_ADDRESS 0xffb80000
+#define SOCFPGA_NANDDATA_ADDRESS 0xffb90000
+#define SOCFPGA_UART0_ADDRESS 0xffc02000
+#define SOCFPGA_UART1_ADDRESS 0xffc02100
+#define SOCFPGA_I2C0_ADDRESS 0xffc02800
+#define SOCFPGA_I2C1_ADDRESS 0xffc02900
+#define SOCFPGA_I2C2_ADDRESS 0xffc02a00
+#define SOCFPGA_I2C3_ADDRESS 0xffc02b00
+#define SOCFPGA_I2C4_ADDRESS 0xffc02c00
+#define SOCFPGA_SPTIMER0_ADDRESS 0xffc03000
+#define SOCFPGA_SPTIMER1_ADDRESS 0xffc03100
+#define SOCFPGA_GPIO0_ADDRESS 0xffc03200
+#define SOCFPGA_GPIO1_ADDRESS 0xffc03300
+#define SOCFPGA_SYSTIMER0_ADDRESS 0xffd00000
+#define SOCFPGA_SYSTIMER1_ADDRESS 0xffd00100
+#define SOCFPGA_L4WD0_ADDRESS 0xffd00200
+#define SOCFPGA_L4WD1_ADDRESS 0xffd00300
+#define SOCFPGA_L4WD2_ADDRESS 0xffd00400
+#define SOCFPGA_L4WD3_ADDRESS 0xffd00500
+#define SOCFPGA_CLKMGR_ADDRESS 0xffd10000
+#define SOCFPGA_RSTMGR_ADDRESS 0xffd11000
+#define SOCFPGA_SYSMGR_ADDRESS 0xffd12000
+#define SOCFPGA_PINMUX_DEDICATED_IO_ADDRESS 0xffd13000
+#define SOCFPGA_DMANONSECURE_ADDRESS 0xffda0000
+#define SOCFPGA_DMASECURE_ADDRESS 0xffda1000
+#define SOCFPGA_SPIS0_ADDRESS 0xffda2000
+#define SOCFPGA_SPIS1_ADDRESS 0xffda3000
+#define SOCFPGA_SPIM0_ADDRESS 0xffda4000
+#define SOCFPGA_SPIM1_ADDRESS 0xffda5000
+#define SOCFPGA_OCRAM_ADDRESS 0xffe00000
+
+#endif /* _SOCFPGA_S10_BASE_HARDWARE_H_ */
--
2.2.2
next prev parent reply other threads:[~2016-08-22 15:02 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-22 15:02 [U-Boot] [PATCH 00/11] Add support for Stratix 10 SoC Chin Liang See
2016-08-22 15:02 ` Chin Liang See [this message]
2016-09-05 15:55 ` [U-Boot] [PATCH 01/11] arm: socfpga: stratix10: Add SOCFPGA Stratix10 base address Marek Vasut
2016-08-22 15:02 ` [U-Boot] [PATCH 02/11] arm: socfpga: rstmgr: Add Reset Manager for Stratix 10 Chin Liang See
2016-09-05 15:56 ` Marek Vasut
2016-08-22 15:02 ` [U-Boot] [PATCH 03/11] arm: socfpga: rstmgr: Segregate the " Chin Liang See
2016-09-05 15:57 ` Marek Vasut
2016-08-22 15:02 ` [U-Boot] [PATCH 04/11] arm: socfpga: clkmgr: Segregate the Clock " Chin Liang See
2016-09-05 15:58 ` Marek Vasut
2016-09-06 5:14 ` Chin Liang See
2016-09-06 12:08 ` Marek Vasut
2016-09-07 13:26 ` Chin Liang See
2016-09-07 14:57 ` Marek Vasut
2016-08-22 15:02 ` [U-Boot] [PATCH 05/11] arm: socfpga: fpgamgr: Segregate the FPGA " Chin Liang See
2016-09-05 16:00 ` Marek Vasut
2016-09-06 5:44 ` Chin Liang See
2016-08-22 15:02 ` [U-Boot] [PATCH 06/11] arm: socfpga: misc: Segregate the misc.c " Chin Liang See
2016-09-05 16:01 ` Marek Vasut
2016-09-06 6:19 ` Chin Liang See
2016-09-06 12:09 ` Marek Vasut
2016-09-07 13:28 ` Chin Liang See
2016-09-07 14:57 ` Marek Vasut
2016-08-22 15:02 ` [U-Boot] [PATCH 07/11] arm: socfpga: sysmgr: Fix casting warning when enabling ARM64 Chin Liang See
2016-09-05 16:02 ` Marek Vasut
2016-09-06 9:41 ` Chin Liang See
2016-09-06 12:12 ` Marek Vasut
2016-09-07 13:31 ` Chin Liang See
2016-09-07 14:54 ` Marek Vasut
2016-08-22 15:02 ` [U-Boot] [PATCH 08/11] arm: socfpga: mmu: Add memory map layout for Stratix 10 SoC Chin Liang See
2016-08-22 15:02 ` [U-Boot] [PATCH 09/11] arm: socfpga: stratix10: Add board folder for Stratix 10 socdk Chin Liang See
2016-09-05 16:03 ` Marek Vasut
2016-09-06 6:29 ` Chin Liang See
2016-08-22 15:02 ` [U-Boot] [PATCH 10/11] arm: dts: socfpga: Add dts " Chin Liang See
2016-09-05 16:04 ` Marek Vasut
2016-08-22 15:02 ` [U-Boot] [PATCH 11/11] arm: socfpga: Add support for Stratix 10 SoC dev kit Chin Liang See
2016-09-05 16:06 ` Marek Vasut
2016-09-06 9:18 ` Chin Liang See
2016-09-06 12:15 ` Marek Vasut
2016-09-07 13:33 ` Chin Liang See
2016-09-07 14:54 ` Marek Vasut
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1471878163-3598-2-git-send-email-clsee@altera.com \
--to=clsee@altera.com \
--cc=u-boot@lists.denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox