From: Chin Liang See <clsee@altera.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 05/11] arm: socfpga: fpgamgr: Segregate the FPGA Manager for Stratix 10
Date: Tue, 6 Sep 2016 13:44:37 +0800 [thread overview]
Message-ID: <1473140677.4366.11.camel@altera.com> (raw)
In-Reply-To: <b4e8787c-354b-8f1f-1e7a-369034efda54@denx.de>
On Mon, 2016-09-05 at 18:00 +0200, Marek Vasut wrote:
> On 08/22/2016 05:02 PM, Chin Liang See wrote:
> > Segregate the FPGA Manager to support both GEN5 SoC and
> > Stratix 10 SoC.
> >
> > Signed-off-by: Chin Liang See <clsee@altera.com>
> > Cc: Marek Vasut <marex@denx.de>
> > Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> > Cc: Ley Foon Tan <lftan@altera.com>
> > ---
> > arch/arm/mach-socfpga/fpga_manager.c | 4 ++++
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/arch/arm/mach-socfpga/fpga_manager.c b/arch/arm/mach
> > -socfpga/fpga_manager.c
> > index 43fd2fe..a01e062 100644
> > --- a/arch/arm/mach-socfpga/fpga_manager.c
> > +++ b/arch/arm/mach-socfpga/fpga_manager.c
> > @@ -20,6 +20,8 @@ DECLARE_GLOBAL_DATA_PTR;
> > /* Timeout count */
> > #define FPGA_TIMEOUT_CNT 0x1000000
> >
> > +#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
> > +
> > static struct socfpga_fpga_manager *fpgamgr_regs =
> > (struct socfpga_fpga_manager
> > *)SOCFPGA_FPGAMGRREGS_ADDRESS;
> >
> > @@ -76,3 +78,5 @@ int fpgamgr_poll_fpga_ready(void)
> >
> > return 0;
> > }
> > +
> > +#endif /* CONFIG_TARGET_SOCFPGA_GEN5 */
> >
> Did you just disable the whole file ? If so, then just don't compile
> it
> at all, just add conditional into the Makefile.
>
Yes, I just realize that :) I shall fix the Makefile instead of this
patch.
Thanks
Chin Liang
next prev parent reply other threads:[~2016-09-06 5:44 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-22 15:02 [U-Boot] [PATCH 00/11] Add support for Stratix 10 SoC Chin Liang See
2016-08-22 15:02 ` [U-Boot] [PATCH 01/11] arm: socfpga: stratix10: Add SOCFPGA Stratix10 base address Chin Liang See
2016-09-05 15:55 ` Marek Vasut
2016-08-22 15:02 ` [U-Boot] [PATCH 02/11] arm: socfpga: rstmgr: Add Reset Manager for Stratix 10 Chin Liang See
2016-09-05 15:56 ` Marek Vasut
2016-08-22 15:02 ` [U-Boot] [PATCH 03/11] arm: socfpga: rstmgr: Segregate the " Chin Liang See
2016-09-05 15:57 ` Marek Vasut
2016-08-22 15:02 ` [U-Boot] [PATCH 04/11] arm: socfpga: clkmgr: Segregate the Clock " Chin Liang See
2016-09-05 15:58 ` Marek Vasut
2016-09-06 5:14 ` Chin Liang See
2016-09-06 12:08 ` Marek Vasut
2016-09-07 13:26 ` Chin Liang See
2016-09-07 14:57 ` Marek Vasut
2016-08-22 15:02 ` [U-Boot] [PATCH 05/11] arm: socfpga: fpgamgr: Segregate the FPGA " Chin Liang See
2016-09-05 16:00 ` Marek Vasut
2016-09-06 5:44 ` Chin Liang See [this message]
2016-08-22 15:02 ` [U-Boot] [PATCH 06/11] arm: socfpga: misc: Segregate the misc.c " Chin Liang See
2016-09-05 16:01 ` Marek Vasut
2016-09-06 6:19 ` Chin Liang See
2016-09-06 12:09 ` Marek Vasut
2016-09-07 13:28 ` Chin Liang See
2016-09-07 14:57 ` Marek Vasut
2016-08-22 15:02 ` [U-Boot] [PATCH 07/11] arm: socfpga: sysmgr: Fix casting warning when enabling ARM64 Chin Liang See
2016-09-05 16:02 ` Marek Vasut
2016-09-06 9:41 ` Chin Liang See
2016-09-06 12:12 ` Marek Vasut
2016-09-07 13:31 ` Chin Liang See
2016-09-07 14:54 ` Marek Vasut
2016-08-22 15:02 ` [U-Boot] [PATCH 08/11] arm: socfpga: mmu: Add memory map layout for Stratix 10 SoC Chin Liang See
2016-08-22 15:02 ` [U-Boot] [PATCH 09/11] arm: socfpga: stratix10: Add board folder for Stratix 10 socdk Chin Liang See
2016-09-05 16:03 ` Marek Vasut
2016-09-06 6:29 ` Chin Liang See
2016-08-22 15:02 ` [U-Boot] [PATCH 10/11] arm: dts: socfpga: Add dts " Chin Liang See
2016-09-05 16:04 ` Marek Vasut
2016-08-22 15:02 ` [U-Boot] [PATCH 11/11] arm: socfpga: Add support for Stratix 10 SoC dev kit Chin Liang See
2016-09-05 16:06 ` Marek Vasut
2016-09-06 9:18 ` Chin Liang See
2016-09-06 12:15 ` Marek Vasut
2016-09-07 13:33 ` Chin Liang See
2016-09-07 14:54 ` Marek Vasut
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