[U-Boot] [PATCH v3 05/12] arm: socfpga: fpgamgr: Disable FPGA Manager for Stratix 10

[See, Chin Liang <chin.liang.see@intel.com>]

On Min, 2016-10-16 at 17:34 +0200, Marek Vasut wrote:
> On 10/13/2016 10:33 AM, Chin Liang See wrote:
> > 
> > Disable the FPGA Manager for Stratix 10 SoC as we are not
> > using this for SOCVP
> If it's not used on SoCVP, then shouldn't this be disabled only for
> SoCVP instead of S10 ?
> 

We will be enhancing this code to support the hardware / emulation in
later phase. In another word, will switch the support from SOCVP to
hardware once its available.

Thanks
Chin Liang

> > 
> > Signed-off-by: Chin Liang See <clsee@altera.com>
> > Cc: Marek Vasut <marex@denx.de>
> > Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> > Cc: Ley Foon Tan <lftan@altera.com>
> > Cc: Tien Fong Chee <tfchee@altera.com>
> > ---
> > ?arch/arm/mach-socfpga/Makefile | 5 +++--
> > ?1 file changed, 3 insertions(+), 2 deletions(-)
> > 
> > diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-
> > socfpga/Makefile
> > index 809cd47..a8ea277 100644
> > --- a/arch/arm/mach-socfpga/Makefile
> > +++ b/arch/arm/mach-socfpga/Makefile
> > @@ -8,12 +8,13 @@
> > ?#
> > 
> > ?obj-y????????+= misc.o timer.o reset_manager.o system_manager.o
> > clock_manager.o \
> > -????????fpga_manager.o board.o
> > +????????board.o
> > 
> > ?obj-$(CONFIG_SPL_BUILD) += spl.o freeze_controller.o
> > 
> > ?# QTS-generated config file wrappers
> > -obj-$(CONFIG_TARGET_SOCFPGA_GEN5)????+= scan_manager.o
> > wrap_pll_config.o
> > +obj-$(CONFIG_TARGET_SOCFPGA_GEN5)????+= scan_manager.o
> > wrap_pll_config.o \
> > +????????????????????????????????????????fpga_manager.o
> > ?obj-$(CONFIG_SPL_BUILD) += wrap_iocsr_config.o
> > wrap_pinmux_config.o??\
> > ?????????????????????????wrap_sdram_config.o
> > ?CFLAGS_wrap_iocsr_config.o???+= -I$(srctree)/board/$(BOARDDIR)
> > 
> 
> --
> Best regards,
> Marek Vasut
> 
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