From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chin Liang See Date: Mon, 17 Oct 2016 22:14:52 +0700 Subject: [U-Boot] [PATCH v3 05/12] arm: socfpga: fpgamgr: Disable FPGA Manager for Stratix 10 In-Reply-To: References: <1476347589-5578-1-git-send-email-clsee@altera.com> <1476347589-5578-6-git-send-email-clsee@altera.com> <1476711324.3076.9.camel@intel.com> Message-ID: <1476717292.4286.8.camel@altera.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Sen, 2016-10-17 at 15:42 +0200, Marek Vasut wrote: > On 10/17/2016 03:35 PM, See, Chin Liang wrote: > > > > On Min, 2016-10-16 at 17:34 +0200, Marek Vasut wrote: > > > > > > On 10/13/2016 10:33 AM, Chin Liang See wrote: > > > > > > > > > > > > Disable the FPGA Manager for Stratix 10 SoC as we are not > > > > using this for SOCVP > > > If it's not used on SoCVP, then shouldn't this be disabled only > > > for > > > SoCVP instead of S10 ? > > > > > We will be enhancing this code to support the hardware / emulation > > in > > later phase. In another word, will switch the support from SOCVP to > > hardware once its available. > > > This is confusing, what would happen if someone tries to use old u- > boot > on real hardware ? It won't work until added drivers for Clocks, Reset and DDR. Current state would be good for SOCVP only where not all hardware is simulated. Thanks Chin Liang > > -- > Best regards, > Marek Vasut >