From: maxims at google.com <maxims@google.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH u-boot 2/5] aspeed: Fixed incosistency in some SCU registers naming.
Date: Tue, 22 Nov 2016 15:56:13 -0800 [thread overview]
Message-ID: <1479858976-139210-3-git-send-email-maxims@google.com> (raw)
In-Reply-To: <1479858976-139210-1-git-send-email-maxims@google.com>
From: Maxim Sloyko <maxims@google.com>
Basically fixed FUC/FUN typo that went out of hand.
Signed-off-by: Maxim Sloyko <maxims@google.com>
---
arch/arm/include/asm/arch-aspeed/regs-scu.h | 73 ++++++++++++++++-------------
arch/arm/mach-aspeed/ast-scu.c | 2 +-
2 files changed, 42 insertions(+), 33 deletions(-)
diff --git a/arch/arm/include/asm/arch-aspeed/regs-scu.h b/arch/arm/include/asm/arch-aspeed/regs-scu.h
index b714fa9..6cb4d0d 100644
--- a/arch/arm/include/asm/arch-aspeed/regs-scu.h
+++ b/arch/arm/include/asm/arch-aspeed/regs-scu.h
@@ -830,49 +830,53 @@
/* AST_SCU_FUN_PIN_CTRL5 0x90 - Multi-function Pin Control#5 */
#define SCU_FUN_PIN_SPICS1 (0x1 << 31)
#define SCU_FUN_PIN_LPC_PLUS (0x1 << 30)
-#define SCU_FUC_PIN_USB20_HOST (0x1 << 29)
-#define SCU_FUC_PIN_USB11_PORT4 (0x1 << 28)
-#define SCU_FUC_PIN_I2C14 (0x1 << 27)
-#define SCU_FUC_PIN_I2C13 (0x1 << 26)
-#define SCU_FUC_PIN_I2C12 (0x1 << 25)
-#define SCU_FUC_PIN_I2C11 (0x1 << 24)
-#define SCU_FUC_PIN_I2C10 (0x1 << 23)
-#define SCU_FUC_PIN_I2C9 (0x1 << 22)
-#define SCU_FUC_PIN_I2C8 (0x1 << 21)
-#define SCU_FUC_PIN_I2C7 (0x1 << 20)
-#define SCU_FUC_PIN_I2C6 (0x1 << 19)
-#define SCU_FUC_PIN_I2C5 (0x1 << 18)
-#define SCU_FUC_PIN_I2C4 (0x1 << 17)
-#define SCU_FUC_PIN_I2C3 (0x1 << 16)
-#define SCU_FUC_PIN_MII2_RX_DWN_DIS (0x1 << 15)
-#define SCU_FUC_PIN_MII2_TX_DWN_DIS (0x1 << 14)
-#define SCU_FUC_PIN_MII1_RX_DWN_DIS (0x1 << 13)
-#define SCU_FUC_PIN_MII1_TX_DWN_DIS (0x1 << 12)
-
-#define SCU_FUC_PIN_MII2_TX_DRIV(x) (x << 10)
-#define SCU_FUC_PIN_MII2_TX_DRIV_MASK (0x3 << 10)
-#define SCU_FUC_PIN_MII1_TX_DRIV(x) (x << 8)
-#define SCU_FUC_PIN_MII1_TX_DRIV_MASK (0x3 << 8)
+#define SCU_FUN_PIN_USB20_HOST (0x1 << 29)
+#define SCU_FUN_PIN_USB11_PORT4 (0x1 << 28)
+#define SCU_FUN_PIN_I2C14 (0x1 << 27)
+#define SCU_FUN_PIN_I2C13 (0x1 << 26)
+#define SCU_FUN_PIN_I2C12 (0x1 << 25)
+#define SCU_FUN_PIN_I2C11 (0x1 << 24)
+#define SCU_FUN_PIN_I2C10 (0x1 << 23)
+#define SCU_FUN_PIN_I2C9 (0x1 << 22)
+#define SCU_FUN_PIN_I2C8 (0x1 << 21)
+#define SCU_FUN_PIN_I2C7 (0x1 << 20)
+#define SCU_FUN_PIN_I2C6 (0x1 << 19)
+#define SCU_FUN_PIN_I2C5 (0x1 << 18)
+#define SCU_FUN_PIN_I2C4 (0x1 << 17)
+#define SCU_FUN_PIN_I2C3 (0x1 << 16)
+#define SCU_FUN_PIN_I2C(n) (0x1 << (16 + (n) - 3))
+#define SCU_FUN_PIN_MII2_RX_DWN_DIS (0x1 << 15)
+#define SCU_FUN_PIN_MII2_TX_DWN_DIS (0x1 << 14)
+#define SCU_FUN_PIN_MII1_RX_DWN_DIS (0x1 << 13)
+#define SCU_FUN_PIN_MII1_TX_DWN_DIS (0x1 << 12)
+
+#define SCU_I2C_MIN_BUS_NUM (1)
+#define SCU_I2C_MAX_BUS_NUM (14)
+
+#define SCU_FUN_PIN_MII2_TX_DRIV(x) (x << 10)
+#define SCU_FUN_PIN_MII2_TX_DRIV_MASK (0x3 << 10)
+#define SCU_FUN_PIN_MII1_TX_DRIV(x) (x << 8)
+#define SCU_FUN_PIN_MII1_TX_DRIV_MASK (0x3 << 8)
#define MII_NORMAL_DRIV 0x0
#define MII_HIGH_DRIV 0x2
-#define SCU_FUC_PIN_UART6 (0x1 << 7)
-#define SCU_FUC_PIN_ROM_16BIT (0x1 << 6)
-#define SCU_FUC_PIN_DIGI_V_OUT(x) (x)
-#define SCU_FUC_PIN_DIGI_V_OUT_MASK (0x3)
+#define SCU_FUN_PIN_UART6 (0x1 << 7)
+#define SCU_FUN_PIN_ROM_16BIT (0x1 << 6)
+#define SCU_FUN_PIN_DIGI_V_OUT(x) (x)
+#define SCU_FUN_PIN_DIGI_V_OUT_MASK (0x3)
#define VIDEO_DISABLE 0x0
#define VIDEO_12BITS 0x1
#define VIDEO_24BITS 0x2
//#define VIDEO_DISABLE 0x3
-#define SCU_FUC_PIN_USB11_PORT2 (0x1 << 3)
-#define SCU_FUC_PIN_SD1_8BIT (0x1 << 3)
+#define SCU_FUN_PIN_USB11_PORT2 (0x1 << 3)
+#define SCU_FUN_PIN_SD1_8BIT (0x1 << 3)
-#define SCU_FUC_PIN_MAC1_MDIO (0x1 << 2)
-#define SCU_FUC_PIN_SD2 (0x1 << 1)
-#define SCU_FUC_PIN_SD1 (0x1 << 0)
+#define SCU_FUN_PIN_MAC1_MDIO (0x1 << 2)
+#define SCU_FUN_PIN_SD2 (0x1 << 1)
+#define SCU_FUN_PIN_SD1 (0x1 << 0)
/* AST_SCU_FUN_PIN_CTRL6 0x94 - Multi-function Pin Control#6*/
@@ -914,6 +918,11 @@
#define SCU_FUN_PIN_ROMA4 (0x1 << 18)
#define SCU_FUN_PIN_ROMA3 (0x1 << 17)
#define SCU_FUN_PIN_ROMA2 (0x1 << 16)
+/* AST2500 only */
+#define SCU_FUN_PIN_SDA2 (0x1 << 15)
+#define SCU_FUN_PIN_SCL2 (0x1 << 14)
+#define SCU_FUN_PIN_SDA1 (0x1 << 13)
+#define SCU_FUN_PIN_SCL1 (0x1 << 12)
/* AST_SCU_FUN_PIN_CTRL9 0xA8 - Multi-function Pin Control#9 */
#define SCU_FUN_PIN_ROMA21 (0x1 << 3)
diff --git a/arch/arm/mach-aspeed/ast-scu.c b/arch/arm/mach-aspeed/ast-scu.c
index 0cc0d67..280c421 100644
--- a/arch/arm/mach-aspeed/ast-scu.c
+++ b/arch/arm/mach-aspeed/ast-scu.c
@@ -394,7 +394,7 @@ void ast_scu_multi_func_eth(u8 num)
AST_SCU_FUN_PIN_CTRL1);
ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL5) |
- SCU_FUC_PIN_MAC1_MDIO,
+ SCU_FUN_PIN_MAC1_MDIO,
AST_SCU_FUN_PIN_CTRL5);
break;
--
2.8.0.rc3.226.g39d4020
next prev parent reply other threads:[~2016-11-22 23:56 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-22 23:56 [U-Boot] [PATCH u-boot 0/5] Aspeed I2C driver, using Driver Model maxims at google.com
2016-11-22 23:56 ` [U-Boot] [PATCH u-boot 1/5] aspeed/g5: Device Tree for ast2500, copied from openbmc/linux (include file), plus minimal device tree configuration for ast2500 eval board maxims at google.com
2016-11-23 16:13 ` Simon Glass
2016-11-23 16:23 ` Simon Glass
2016-11-22 23:56 ` maxims at google.com [this message]
2016-11-23 16:13 ` [U-Boot] [PATCH u-boot 2/5] aspeed: Fixed incosistency in some SCU registers naming Simon Glass
2016-11-23 16:24 ` Simon Glass
2016-11-22 23:56 ` [U-Boot] [PATCH u-boot 3/5] aspeed: Added function to calculate APB Clock frequency maxims at google.com
2016-11-23 16:13 ` Simon Glass
2016-11-23 16:24 ` Simon Glass
2016-11-22 23:56 ` [U-Boot] [PATCH u-boot 4/5] aspeed: Added function to configure pins for I2C devices maxims at google.com
2016-11-23 16:13 ` Simon Glass
2016-11-23 16:24 ` Simon Glass
2016-11-22 23:56 ` [U-Boot] [PATCH u-boot 5/5] aspeed: I2C driver maxims at google.com
2016-11-23 16:13 ` Simon Glass
2016-11-23 16:24 ` Simon Glass
2016-11-23 12:28 ` [U-Boot] [PATCH u-boot 0/5] Aspeed I2C driver, using Driver Model Heiko Schocher
2016-11-23 16:40 ` Maxim Sloyko
2016-11-24 5:19 ` Heiko Schocher
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1479858976-139210-3-git-send-email-maxims@google.com \
--to=maxims@google.com \
--cc=u-boot@lists.denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox