From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chee, Tien Fong Date: Fri, 9 Dec 2016 09:46:40 +0000 Subject: [U-Boot] [PATCH 02/10] arm: socfpga: arria10: Added config option build for SPL In-Reply-To: <6e86de1d-26b5-a640-5103-755fe30e8956@denx.de> References: <1481010767-3325-1-git-send-email-tien.fong.chee@intel.com> <1481108228.2741.19.camel@intel.com> <6e86de1d-26b5-a640-5103-755fe30e8956@denx.de> Message-ID: <1481276799.2741.40.camel@intel.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Rab, 2016-12-07 at 14:54 +0100, Marek Vasut wrote: > On 12/07/2016 11:57 AM, Chee, Tien Fong wrote: > > > > On Sel, 2016-12-06 at 13:47 +0100, Marek Vasut wrote: > > > > > > On 12/06/2016 08:52 AM, Chee Tien Fong wrote: > > > > > > > > > > > > From: Tien Fong Chee > > > > > > > > These changes to ensure Arria10 SPL build success. > > > Please reword the commit message, mention you're removing the > > > Arria10 > > > bits. Still, this does not even apply on mainline, on top of what > > > does > > > this apply ? > > > > > I disabled some features temporary, so SPL build can pass and print > > out > > working. I will enable these features back in upcoming patches. > > This is > > base on 01-arria10 branch. > But this patch seems to only enable stuff ... ? > Enable the spl. Disable SPI flash temporary, for preventing build failed, but this will be enabled back with upcoming patches for supporting SPI flash. > > > > > > > > > > > > > Signed-off-by: Tien Fong Chee > > > > Cc: Marek Vasut > > > > Cc: Dinh Nguyen > > > > Cc: Chin Liang See > > > > Cc: Tien Fong > > > > --- > > > > ?arch/arm/Kconfig |????8 ++++---- > > > > ?1 files changed, 4 insertions(+), 4 deletions(-) > > > > > > > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > > > > index 220bb19..05ce8b8 100644 > > > > --- a/arch/arm/Kconfig > > > > +++ b/arch/arm/Kconfig > > > > @@ -622,12 +622,12 @@ config ARCH_SNAPDRAGON > > > > ?config ARCH_SOCFPGA > > > > ? bool "Altera SOCFPGA family" > > > > ? select CPU_V7 > > > > - select SUPPORT_SPL if !TARGET_SOCFPGA_ARRIA10 > > > > + select SUPPORT_SPL > > > > ? select OF_CONTROL > > > > - select SPL_OF_CONTROL if !TARGET_SOCFPGA_ARRIA10 > > > > + select SPL_OF_CONTROL > > > > ? select DM > > > > - select DM_SPI_FLASH > > > > - select DM_SPI > > > > + select DM_SPI_FLASH if !TARGET_SOCFPGA_ARRIA10 > > > > + select DM_SPI if !TARGET_SOCFPGA_ARRIA10 > > > > ? > > > > ?config TARGET_CM_T43 > > > > ? bool "Support cm_t43" > > > > >