From: Chee Tien Fong <tien.fong.chee@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2 12/30] arm: socfpga: arria10: don't build GEN5 sdram for arria10
Date: Wed, 28 Dec 2016 14:34:23 +0800 [thread overview]
Message-ID: <1482906881-8120-12-git-send-email-tien.fong.chee@intel.com> (raw)
In-Reply-To: <1482906881-8120-1-git-send-email-tien.fong.chee@intel.com>
From: Dinh Nguyen <dinh.linux@gmail.com>
The Arria10 device will not be able to re-use the GEN5 SDRAM controller,
so we shouldn't build the driver. Move CONFIG_ALTERA_SDRAM to Kconfig
option in drivers/ddr/altera/Kconfig.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
drivers/Kconfig | 2 ++
drivers/ddr/Kconfig | 1 +
drivers/ddr/altera/Kconfig | 6 ++++++
include/configs/socfpga_common.h | 5 -----
4 files changed, 9 insertions(+), 5 deletions(-)
create mode 100644 drivers/ddr/Kconfig
create mode 100644 drivers/ddr/altera/Kconfig
diff --git a/drivers/Kconfig b/drivers/Kconfig
index e8c9e0a..0178498 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -14,6 +14,8 @@ source "drivers/cpu/Kconfig"
source "drivers/crypto/Kconfig"
+source "drivers/ddr/Kconfig"
+
source "drivers/demo/Kconfig"
source "drivers/dfu/Kconfig"
diff --git a/drivers/ddr/Kconfig b/drivers/ddr/Kconfig
new file mode 100644
index 0000000..b764add
--- /dev/null
+++ b/drivers/ddr/Kconfig
@@ -0,0 +1 @@
+source "drivers/ddr/altera/Kconfig"
diff --git a/drivers/ddr/altera/Kconfig b/drivers/ddr/altera/Kconfig
new file mode 100644
index 0000000..9554da7
--- /dev/null
+++ b/drivers/ddr/altera/Kconfig
@@ -0,0 +1,6 @@
+config ALTERA_SDRAM
+ bool "SoCFPGA SDRAM for Arria5/Cyclone5 devices"
+ default y if TARGET_SOCFPGA_GEN5
+ help
+ This is for building the SDRAM controller for the Arria5/Cyclone5
+ devices.
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 58a6550..f6a2f8d 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -77,11 +77,6 @@
#define CONFIG_SYS_PL310_BASE SOCFPGA_MPUL2_ADDRESS
/*
- * SDRAM controller
- */
-#define CONFIG_ALTERA_SDRAM
-
-/*
* EPCS/EPCQx1 Serial Flash Controller
*/
#ifdef CONFIG_ALTERA_SPI
--
2.2.2
next prev parent reply other threads:[~2016-12-28 6:34 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-28 6:34 [U-Boot] [PATCH v2 01/30] arm: socfpga: arria10: add additional i2c nodes for Arria10 Chee Tien Fong
2016-12-28 6:34 ` [U-Boot] [PATCH v2 02/30] arm: socfpga: arria10: add sdram defines " Chee Tien Fong
2016-12-28 6:34 ` [U-Boot] [PATCH v2 03/30] arm: socfpga: arria10: add board files for the Arria10 SoCDK Chee Tien Fong
2016-12-28 6:34 ` [U-Boot] [PATCH v2 04/30] arm: socfpga: arria10: add system manager defines Chee Tien Fong
2016-12-28 6:34 ` [U-Boot] [PATCH v2 05/30] arm: socfpga: arria10: add misc functions for Arria10 Chee Tien Fong
2016-12-28 6:34 ` [U-Boot] [PATCH v2 06/30] arm: socfpga: arria10: add socfpga_arria10_socdk config Chee Tien Fong
2016-12-28 6:34 ` [U-Boot] [PATCH v2 07/30] arm: socfpga: arria10: add socfpga_arria10_defconfig Chee Tien Fong
2016-12-28 6:34 ` [U-Boot] [PATCH v2 08/30] arm: socfpga: arria10: add config option build for arria10 Chee Tien Fong
2016-12-28 6:34 ` [U-Boot] [PATCH v2 09/30] arm: socfpga: add define for bootinfo bsel bit shift Chee Tien Fong
2016-12-28 6:34 ` [U-Boot] [PATCH v2 10/30] arm: socfpga: arria10: add reset manager for Arria10 Chee Tien Fong
2016-12-28 6:34 ` [U-Boot] [PATCH v2 11/30] arm: socfpga: wrap system manager functions for A5/C5 devices Chee Tien Fong
2016-12-28 6:34 ` Chee Tien Fong [this message]
2016-12-28 6:34 ` [U-Boot] [PATCH v2 13/30] arm: socfpga: arria10 fpga does not have bridges mapped Chee Tien Fong
2016-12-28 6:34 ` [U-Boot] [PATCH v2 14/30] arm: socfpga: arria10: remove board_init and s_init Chee Tien Fong
2016-12-28 6:34 ` [U-Boot] [PATCH v2 15/30] arm: socfpga: combine clrbits/setbits into a single clrsetbits Chee Tien Fong
2016-12-28 6:34 ` [U-Boot] [PATCH v2 16/30] arm: socfpga: add reset manager defines for Arria10 Chee Tien Fong
2016-12-28 6:34 ` [U-Boot] [PATCH v2 17/30] arm: socfpga: arria10: update dwmac reset function to support Arria10 Chee Tien Fong
2016-12-28 6:34 ` [U-Boot] [PATCH v2 18/30] arm: socfpga: stratix10: Add SOCFPGA Stratix10 base address Chee Tien Fong
2016-12-28 6:34 ` [U-Boot] [PATCH v2 19/30] ARM:dts: Added device tree for socfpga arria10 development kit sdmmc Chee Tien Fong
2016-12-28 6:34 ` [U-Boot] [PATCH v2 20/30] arm: socfpga: arria10: Enable SPL for Arria 10 Chee Tien Fong
2016-12-28 6:34 ` [U-Boot] [PATCH v2 21/30] arm: socfpga: arria10: Enhanced socfpga_arria10_defconfig to support SPL Chee Tien Fong
2016-12-28 23:51 ` Marek Vasut
2016-12-29 4:54 ` Chee, Tien Fong
2016-12-30 19:04 ` Marek Vasut
2017-01-03 5:38 ` Chee, Tien Fong
2016-12-28 6:34 ` [U-Boot] [PATCH v2 22/30] arm: socfpga: arria10: Added clock manager and pin mux compat macro Chee Tien Fong
2016-12-28 6:34 ` [U-Boot] [PATCH v2 23/30] arm: socfpga: arria10: Added some hardware base address for Arria 10 Chee Tien Fong
2016-12-28 6:34 ` [U-Boot] [PATCH v2 24/30] arm: socfpga: arria10: Added support for Arria 10 socdk Chee Tien Fong
2016-12-28 6:34 ` [U-Boot] [PATCH v2 25/30] arm: socfpga: arria10: Added drivers for Arria10 Reset Manager Chee Tien Fong
2016-12-28 6:34 ` [U-Boot] [PATCH v2 26/30] arm: socfpga: arria10: Added miscellaneous drivers for Arria 10 Chee Tien Fong
2016-12-28 6:34 ` [U-Boot] [PATCH v2 27/30] arm: socfpga: arria10: Added drivers for Arria10 clock manager Chee Tien Fong
2016-12-28 6:34 ` [U-Boot] [PATCH v2 28/30] arm: socfpga: arria10: Added drivers for Arria10 pinmux/pins configuration Chee Tien Fong
2016-12-28 6:34 ` [U-Boot] [PATCH v2 29/30] arm: socfpga: arria10: Added Arria10 critical HW initialization to spl Chee Tien Fong
2016-12-30 12:14 ` Dinh Nguyen
2017-01-03 5:43 ` Chee, Tien Fong
2016-12-28 6:34 ` [U-Boot] [PATCH v2 30/30] arm: socfpga: arria10: Enable fpga driver build for SPL Chee Tien Fong
-- strict thread matches above, loose matches on Subject: below --
2016-12-29 5:44 [U-Boot] [PATCH v2 01/30] arm: socfpga: arria10: add additional i2c nodes for Arria10 Chee Tien Fong
2016-12-29 5:44 ` [U-Boot] [PATCH v2 12/30] arm: socfpga: arria10: don't build GEN5 sdram for arria10 Chee Tien Fong
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