From: Chee Tien Fong <tien.fong.chee@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2 15/30] arm: socfpga: combine clrbits/setbits into a single clrsetbits
Date: Thu, 29 Dec 2016 13:44:43 +0800 [thread overview]
Message-ID: <1482990285-3448-15-git-send-email-tien.fong.chee@intel.com> (raw)
In-Reply-To: <1482990285-3448-1-git-send-email-tien.fong.chee@intel.com>
From: Dinh Nguyen <dinguyen@kernel.org>
There is no dependency on doing a separate clrbits first in the
dwmac_deassert_reset function. Combine them into a single
clrsetbits call.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
arch/arm/mach-socfpga/misc.c | 9 +++------
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
index 2645129..c97caea 100644
--- a/arch/arm/mach-socfpga/misc.c
+++ b/arch/arm/mach-socfpga/misc.c
@@ -100,13 +100,10 @@ static void dwmac_deassert_reset(const unsigned int of_reset_id,
return;
}
- /* Clearing emac0 PHY interface select to 0 */
- clrbits_le32(&sysmgr_regs->emacgrp_ctrl,
- SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << physhift);
-
/* configure to PHY interface select choosed */
- setbits_le32(&sysmgr_regs->emacgrp_ctrl,
- phymode << physhift);
+ clrsetbits_le32(&sysmgr_regs->emacgrp_ctrl,
+ SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << physhift,
+ phymode << physhift);
/* Release the EMAC controller from reset */
socfpga_per_reset(reset, 0);
--
2.2.2
next prev parent reply other threads:[~2016-12-29 5:44 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-29 5:44 [U-Boot] [PATCH v2 01/30] arm: socfpga: arria10: add additional i2c nodes for Arria10 Chee Tien Fong
2016-12-29 5:44 ` [U-Boot] [PATCH v2 02/30] arm: socfpga: arria10: add sdram defines " Chee Tien Fong
2016-12-29 5:44 ` [U-Boot] [PATCH v2 03/30] arm: socfpga: arria10: add board files for the Arria10 SoCDK Chee Tien Fong
2016-12-29 5:44 ` [U-Boot] [PATCH v2 04/30] arm: socfpga: arria10: add system manager defines Chee Tien Fong
2016-12-29 5:44 ` [U-Boot] [PATCH v2 05/30] arm: socfpga: arria10: add misc functions for Arria10 Chee Tien Fong
2016-12-29 5:44 ` [U-Boot] [PATCH v2 06/30] arm: socfpga: arria10: add socfpga_arria10_socdk config Chee Tien Fong
2016-12-29 5:44 ` [U-Boot] [PATCH v2 07/30] arm: socfpga: arria10: add socfpga_arria10_defconfig Chee Tien Fong
2016-12-29 5:44 ` [U-Boot] [PATCH v2 08/30] arm: socfpga: arria10: add config option build for arria10 Chee Tien Fong
2016-12-29 5:44 ` [U-Boot] [PATCH v2 09/30] arm: socfpga: add define for bootinfo bsel bit shift Chee Tien Fong
2016-12-29 5:44 ` [U-Boot] [PATCH v2 10/30] arm: socfpga: arria10: add reset manager for Arria10 Chee Tien Fong
2016-12-29 5:44 ` [U-Boot] [PATCH v2 11/30] arm: socfpga: wrap system manager functions for A5/C5 devices Chee Tien Fong
2016-12-29 5:44 ` [U-Boot] [PATCH v2 12/30] arm: socfpga: arria10: don't build GEN5 sdram for arria10 Chee Tien Fong
2016-12-29 5:44 ` [U-Boot] [PATCH v2 13/30] arm: socfpga: arria10 fpga does not have bridges mapped Chee Tien Fong
2016-12-29 5:44 ` [U-Boot] [PATCH v2 14/30] arm: socfpga: arria10: remove board_init and s_init Chee Tien Fong
2016-12-29 5:44 ` Chee Tien Fong [this message]
2016-12-29 5:44 ` [U-Boot] [PATCH v2 16/30] arm: socfpga: add reset manager defines for Arria10 Chee Tien Fong
2016-12-29 5:44 ` [U-Boot] [PATCH v2 17/30] arm: socfpga: arria10: update dwmac reset function to support Arria10 Chee Tien Fong
-- strict thread matches above, loose matches on Subject: below --
2016-12-28 6:34 [U-Boot] [PATCH v2 01/30] arm: socfpga: arria10: add additional i2c nodes for Arria10 Chee Tien Fong
2016-12-28 6:34 ` [U-Boot] [PATCH v2 15/30] arm: socfpga: combine clrbits/setbits into a single clrsetbits Chee Tien Fong
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