From: Chee, Tien Fong <tien.fong.chee@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v4 00/28] *** SUBJECT HERE ***
Date: Wed, 11 Jan 2017 04:03:02 +0000 [thread overview]
Message-ID: <1484107381.2488.35.camel@intel.com> (raw)
In-Reply-To: <be973cff-e896-e98a-578b-421d98ac3e05@denx.de>
On Sel, 2017-01-10 at 23:06 +0100, Marek Vasut wrote:
> On 01/10/2017 06:20 AM, Chee Tien Fong wrote:
> >
> > From: Tien Fong Chee <tien.fong.chee@intel.com>
> >
> > *** BLURB HERE ***
> Please at least fill the blanks next time ... :)
>
Opps....sorry, i just realized i need to fill up the blanks here.
> >
> > Tien Fong Chee (28):
> > ? arm: socfpga: arria10: add additional i2c nodes for Arria10
> > ? arm: socfpga: arria10: add sdram defines for Arria10
> > ? arm: socfpga: arria10: add board files for the Arria10 SoCDK
> > ? arm: socfpga: arria10: add system manager defines
> > ? arm: socfpga: arria10: add misc functions for Arria10
> > ? arm: socfpga: arria10: add socfpga_arria10_socdk config
> > ? arm: socfpga: arria10: add socfpga_arria10_defconfig
> > ? arm: socfpga: arria10: add config option build for arria10
> > ? arm: socfpga: add define for bootinfo bsel bit shift
> > ? arm: socfpga: arria10: add reset manager for Arria10
> > ? arm: socfpga: wrap system manager functions for A5/C5 devices
> > ? arm: socfpga: arria10: don't build GEN5 sdram for arria10
> > ? arm: socfpga: arria10 fpga does not have bridges mapped
> > ? arm: socfpga: arria10: remove board_init and s_init
> > ? arm: socfpga: combine clrbits/setbits into a single clrsetbits
> > ? arm: socfpga: add reset manager defines for Arria10
> > ? arm: socfpga: arria10: update dwmac reset function to support
> > Arria10
> > ? ARM:dts: Added device tree for socfpga arria10 development kit
> > sdmmc
> > ? arm: socfpga: arria10: Enable SPL for Arria 10
> > ? arm: socfpga: arria10: Added clock manager and pin mux compat
> > macro
> > ? arm: socfpga: arria10: Added some hardware base address for Arria
> > 10
> > ? arm: socfpga: arria10: Added support for Arria 10 socdk
> > ? arm: socfpga: arria10: Added drivers for Arria10 Reset Manager
> > ? arm: socfpga: arria10: Added miscellaneous drivers for Arria 10
> > ? arm: socfpga: arria10: Added drivers for Arria10 clock manager
> > ? arm: socfpga: arria10: Added drivers for Arria10 pinmux/pins
> > ????configuration
> > ? arm: socfpga: arria10: Added Arria10 critical HW initialization
> > to spl
> > ? arm: socfpga: arria10: Enable fpga driver build for SPL.
> >
> > ?arch/arm/dts/Makefile??????????????????????????????|???3 +-
> > ?arch/arm/dts/socfpga_arria10.dtsi??????????????????| 859
> > +++++++++++++++++++
> > ?arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts???????|??30 +
> > ?.../dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi???| 479
> > +++++++++++
> > ?arch/arm/mach-socfpga/Kconfig??????????????????????|??10 +
> > ?arch/arm/mach-socfpga/Makefile?????????????????????|??18 +-
> > ?arch/arm/mach-socfpga/clock_manager.c??????????????| 752 +++++++
> > ---------
> > ?arch/arm/mach-socfpga/clock_manager_arria10.c??????| 954
> > +++++++++++++++++++++
> > ?.../{clock_manager.c => clock_manager_gen5.c}??????| 240 +-----
> > ?arch/arm/mach-socfpga/include/mach/base_addr_a10.h |???8 +-
> > ?arch/arm/mach-socfpga/include/mach/clock_manager.h | 356 ++++++--
> > ?arch/arm/mach-socfpga/include/mach/misc.h??????????|??32 +
> > ?arch/arm/mach-socfpga/include/mach/pinmux.h????????|??17 +
> > ?arch/arm/mach-socfpga/include/mach/reset_manager.h | 152 +++-
> > ?arch/arm/mach-socfpga/include/mach/sdram_a10.h?????| 380 ++++++++
> > ?.../arm/mach-socfpga/include/mach/system_manager.h | 122 +++
> > ?arch/arm/mach-socfpga/misc.c???????????????????????| 367 +-------
> > ?arch/arm/mach-socfpga/misc_arria10.c???????????????| 255 ++++++
> > ?arch/arm/mach-socfpga/{misc.c => misc_gen5.c}??????| 178 +---
> > ?arch/arm/mach-socfpga/pinmux.c?????????????????????| 104 +++
> > ?arch/arm/mach-socfpga/reset_manager.c??????????????|??90 +-
> > ?arch/arm/mach-socfpga/reset_manager_arria10.c??????| 407 +++++++++
> > ?.../{reset_manager.c => reset_manager_gen5.c}??????|??82 +-
> > ?arch/arm/mach-socfpga/spl.c????????????????????????|??79 +-
> > ?arch/arm/mach-socfpga/system_manager.c?????????????|???6 +-
> > ?board/altera/arria10-socdk/Kconfig?????????????????|??18 +
> > ?board/altera/arria10-socdk/Makefile????????????????|???7 +
> > ?board/altera/arria10-socdk/socfpga.c???????????????|???7 +
> > ?configs/socfpga_arria10_defconfig??????????????????|??24 +
> > ?drivers/Kconfig????????????????????????????????????|???2 +
> > ?drivers/Makefile???????????????????????????????????|???2 +-
> > ?drivers/ddr/Kconfig????????????????????????????????|???1 +
> > ?drivers/ddr/altera/Kconfig?????????????????????????|???6 +
> > ?drivers/fpga/socfpga.c?????????????????????????????|???9 +-
> > ?include/configs/socfpga_arria10_socdk.h????????????| 106 +++
> > ?include/configs/socfpga_common.h???????????????????|??38 +-
> > ?include/dt-bindings/reset/altr,rst-mgr-a10.h???????| 103 +++
> > ?include/fdtdec.h???????????????????????????????????|???8 +
> > ?lib/fdtdec.c???????????????????????????????????????|???8 +
> > ?39 files changed, 4937 insertions(+), 1382 deletions(-)
> > ?create mode 100644 arch/arm/dts/socfpga_arria10.dtsi
> > ?create mode 100644 arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
> > ?create mode 100644
> > arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi
> > ?create mode 100644 arch/arm/mach-socfpga/clock_manager_arria10.c
> > ?copy arch/arm/mach-socfpga/{clock_manager.c =>
> > clock_manager_gen5.c} (62%)
> > ?create mode 100644 arch/arm/mach-socfpga/include/mach/misc.h
> > ?create mode 100644 arch/arm/mach-socfpga/include/mach/pinmux.h
> > ?create mode 100644 arch/arm/mach-socfpga/include/mach/sdram_a10.h
> > ?create mode 100644 arch/arm/mach-socfpga/misc_arria10.c
> > ?copy arch/arm/mach-socfpga/{misc.c => misc_gen5.c} (73%)
> > ?create mode 100644 arch/arm/mach-socfpga/pinmux.c
> > ?create mode 100644 arch/arm/mach-socfpga/reset_manager_arria10.c
> > ?copy arch/arm/mach-socfpga/{reset_manager.c =>
> > reset_manager_gen5.c} (67%)
> > ?create mode 100644 board/altera/arria10-socdk/Kconfig
> > ?create mode 100644 board/altera/arria10-socdk/Makefile
> > ?create mode 100644 board/altera/arria10-socdk/socfpga.c
> > ?create mode 100644 configs/socfpga_arria10_defconfig
> > ?create mode 100644 drivers/ddr/Kconfig
> > ?create mode 100644 drivers/ddr/altera/Kconfig
> > ?create mode 100644 include/configs/socfpga_arria10_socdk.h
> > ?create mode 100644 include/dt-bindings/reset/altr,rst-mgr-a10.h
> >
>
next prev parent reply other threads:[~2017-01-11 4:03 UTC|newest]
Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-10 5:20 [U-Boot] [PATCH v4 00/28] *** SUBJECT HERE *** Chee Tien Fong
2017-01-10 5:20 ` [U-Boot] [PATCH v4 01/28] arm: socfpga: arria10: add additional i2c nodes for Arria10 Chee Tien Fong
2017-01-23 3:38 ` Marek Vasut
2017-01-10 5:20 ` [U-Boot] [PATCH v4 02/28] arm: socfpga: arria10: add sdram defines " Chee Tien Fong
2017-01-23 3:40 ` Marek Vasut
2017-02-17 10:12 ` Ley Foon Tan
2017-01-10 5:20 ` [U-Boot] [PATCH v4 03/28] arm: socfpga: arria10: add board files for the Arria10 SoCDK Chee Tien Fong
2017-01-23 3:42 ` Marek Vasut
2017-01-10 5:20 ` [U-Boot] [PATCH v4 04/28] arm: socfpga: arria10: add system manager defines Chee Tien Fong
2017-01-23 3:43 ` Marek Vasut
2017-01-10 5:20 ` [U-Boot] [PATCH v4 05/28] arm: socfpga: arria10: add misc functions for Arria10 Chee Tien Fong
2017-01-23 3:45 ` Marek Vasut
2017-01-10 5:20 ` [U-Boot] [PATCH v4 06/28] arm: socfpga: arria10: add socfpga_arria10_socdk config Chee Tien Fong
2017-01-23 3:46 ` Marek Vasut
2017-02-17 10:18 ` Ley Foon Tan
2017-02-17 21:12 ` Marek Vasut
2017-02-17 21:53 ` Dalon Westergreen
2017-02-17 21:57 ` Marek Vasut
2017-02-18 14:18 ` Dalon Westergreen
2017-02-18 15:20 ` Marek Vasut
2017-02-17 22:53 ` Dalon Westergreen
2017-01-10 5:20 ` [U-Boot] [PATCH v4 07/28] arm: socfpga: arria10: add socfpga_arria10_defconfig Chee Tien Fong
2017-01-23 3:46 ` Marek Vasut
2017-01-10 5:20 ` [U-Boot] [PATCH v4 08/28] arm: socfpga: arria10: add config option build for arria10 Chee Tien Fong
2017-01-23 3:48 ` Marek Vasut
2017-01-10 5:20 ` [U-Boot] [PATCH v4 09/28] arm: socfpga: add define for bootinfo bsel bit shift Chee Tien Fong
2017-01-23 3:49 ` Marek Vasut
2017-01-10 5:20 ` [U-Boot] [PATCH v4 10/28] arm: socfpga: arria10: add reset manager for Arria10 Chee Tien Fong
2017-01-23 3:52 ` Marek Vasut
2017-01-10 5:20 ` [U-Boot] [PATCH v4 11/28] arm: socfpga: wrap system manager functions for A5/C5 devices Chee Tien Fong
2017-01-23 3:53 ` Marek Vasut
2017-02-17 10:20 ` Ley Foon Tan
2017-02-17 21:12 ` Marek Vasut
2017-01-10 5:20 ` [U-Boot] [PATCH v4 12/28] arm: socfpga: arria10: don't build GEN5 sdram for arria10 Chee Tien Fong
2017-01-23 3:54 ` Marek Vasut
2017-01-10 5:20 ` [U-Boot] [PATCH v4 13/28] arm: socfpga: arria10 fpga does not have bridges mapped Chee Tien Fong
2017-01-23 3:55 ` Marek Vasut
2017-01-10 5:20 ` [U-Boot] [PATCH v4 14/28] arm: socfpga: arria10: remove board_init and s_init Chee Tien Fong
2017-01-23 3:56 ` Marek Vasut
2017-01-10 5:20 ` [U-Boot] [PATCH v4 15/28] arm: socfpga: combine clrbits/setbits into a single clrsetbits Chee Tien Fong
2017-01-23 3:58 ` Marek Vasut
2017-02-16 3:34 ` Ley Foon Tan
2017-02-17 7:54 ` Marek Vasut
2017-02-17 9:10 ` Ley Foon Tan
2017-02-17 21:11 ` Marek Vasut
2017-02-17 21:05 ` Marek Vasut
2017-01-10 5:20 ` [U-Boot] [PATCH v4 16/28] arm: socfpga: add reset manager defines for Arria10 Chee Tien Fong
2017-01-23 3:58 ` Marek Vasut
2017-01-10 5:20 ` [U-Boot] [PATCH v4 17/28] arm: socfpga: arria10: update dwmac reset function to support Arria10 Chee Tien Fong
2017-01-23 4:00 ` Marek Vasut
2017-01-10 5:20 ` [U-Boot] [PATCH v4 18/28] ARM:dts: Added device tree for socfpga arria10 development kit sdmmc Chee Tien Fong
2017-01-23 4:03 ` Marek Vasut
2017-01-10 5:20 ` [U-Boot] [PATCH v4 19/28] arm: socfpga: arria10: Enable SPL for Arria 10 Chee Tien Fong
2017-01-23 4:04 ` Marek Vasut
2017-01-10 5:20 ` [U-Boot] [PATCH v4 20/28] arm: socfpga: arria10: Added clock manager and pin mux compat macro Chee Tien Fong
2017-01-23 4:05 ` Marek Vasut
2017-02-16 10:28 ` Ley Foon Tan
2017-01-10 5:20 ` [U-Boot] [PATCH v4 21/28] arm: socfpga: arria10: Added some hardware base address for Arria 10 Chee Tien Fong
2017-01-23 4:06 ` Marek Vasut
2017-01-10 5:20 ` [U-Boot] [PATCH v4 22/28] arm: socfpga: arria10: Added support for Arria 10 socdk Chee Tien Fong
2017-01-23 4:07 ` Marek Vasut
2017-01-10 5:20 ` [U-Boot] [PATCH v4 23/28] arm: socfpga: arria10: Added drivers for Arria10 Reset Manager Chee Tien Fong
2017-01-23 4:13 ` Marek Vasut
2017-01-10 5:20 ` [U-Boot] [PATCH v4 24/28] arm: socfpga: arria10: Added miscellaneous drivers for Arria 10 Chee Tien Fong
2017-01-23 4:16 ` Marek Vasut
2017-02-17 3:31 ` Ley Foon Tan
2017-01-10 5:20 ` [U-Boot] [PATCH v4 25/28] arm: socfpga: arria10: Added drivers for Arria10 clock manager Chee Tien Fong
2017-01-23 4:18 ` Marek Vasut
2017-02-17 8:56 ` Ley Foon Tan
2017-02-17 21:10 ` Marek Vasut
2017-02-20 2:34 ` Ley Foon Tan
2017-02-20 7:28 ` Marek Vasut
2017-01-10 5:20 ` [U-Boot] [PATCH v4 26/28] arm: socfpga: arria10: Added drivers for Arria10 pinmux/pins configuration Chee Tien Fong
2017-01-23 4:19 ` Marek Vasut
2017-02-17 10:06 ` Ley Foon Tan
2017-01-10 5:20 ` [U-Boot] [PATCH v4 27/28] arm: socfpga: arria10: Added Arria10 critical HW initialization to spl Chee Tien Fong
2017-01-23 4:21 ` Marek Vasut
2017-01-10 5:20 ` [U-Boot] [PATCH v4 28/28] arm: socfpga: arria10: Enable fpga driver build for SPL Chee Tien Fong
2017-01-23 4:22 ` Marek Vasut
2017-01-10 22:06 ` [U-Boot] [PATCH v4 00/28] *** SUBJECT HERE *** Marek Vasut
2017-01-11 4:03 ` Chee, Tien Fong [this message]
2017-01-11 6:59 ` Chee, Tien Fong
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