From: Scott Wood <oss@buserror.net>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] armv8/fsl-layerscape: fdt: remove SYSCLK frequency fixup for ls1012a
Date: Fri, 20 Jan 2017 16:13:57 -0600 [thread overview]
Message-ID: <1484950437.17813.12.camel@buserror.net> (raw)
In-Reply-To: <AM4PR0401MB17329E54977F79C438AD97ED9A710@AM4PR0401MB1732.eurprd04.prod.outlook.com>
On Fri, 2017-01-20 at 21:38 +0000, york sun wrote:
> On 01/20/2017 01:36 PM, Scott Wood wrote:
> >
> > On Fri, 2017-01-20 at 16:28 +0000, york sun wrote:
> > >
> > > On 01/19/2017 07:34 PM, Yangbo Lu wrote:
> > > >
> > > >
> > > > Generally SYSCLK frequency is dependent on on-board switch settings.
> > > > It may vary as per requirement, but this doesn't apply to ls1012a.
> > > > ls1012a has its SYSCLK frequencies specified in the RM. The fixup
> > > > for all 'fixed-clock' compatibles of ls1012a would cause incorrect
> > > > SYSCLK frequency values. So remove the SYSCLK frequency fixup for
> > > > ls1012a.
> > > >
> > > > Fixes: 6f14e25 ("armv8: fsl-lsch3: fixup SYSCLK frequency in device
> > > > tree")
> > > > Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> > > > ---
> > > > ?arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 2 ++
> > > > ?1 file changed, 2 insertions(+)
> > > >
> > > > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
> > > > b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
> > > > index c10ccf9..e59c232 100644
> > > > --- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
> > > > +++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
> > > > @@ -161,8 +161,10 @@ void ft_cpu_setup(void *blob, bd_t *bd)
> > > > ? ???????"clock-frequency",
> > > > CONFIG_SYS_NS16550_CLK,
> > > > 1);
> > > > ?#endif
> > > >
> > > > +#ifndef CONFIG_ARCH_LS1012A
> > > > ? do_fixup_by_compat_u32(blob, "fixed-clock",
> > > > ? ???????"clock-frequency",
> > > > CONFIG_SYS_CLK_FREQ,
> > > > 1);
> > > > +#endif
> > > >
> > > > ?#ifdef CONFIG_PCI
> > > > ? ft_pci_setup(blob, bd);
> > > >
> > > Yangbo,
> > >
> > > Why fixing up this clock causes incorect frequency value? The macro
> > > CONFIG_SYS_CLK_FREQ is defined as 125MHz for ls1012a.
> > Because ls1012a has two different input frequencies -- 125 MHz for the
> > platform PLL and 100 MHz for the core PLLs.??When we added a second fixed-
> > clock node for the latter, U-Boot was overwriting it.
> >
> > While the ifdef solves this immediate problem, it doesn't fix the
> > underlying
> > problem that this fixup is overly broad.??It should identify the specific
> > node
> > it's looking for, and not overwrite every fixed-clock node it finds.
> >
> So current code tries to fix up any node with "fixed-clock"? That's not?
> good. What if we have multiple fixed clocks?
>
That is exactly the problem. ?This patch avoids the issue on ls1012a but not
in general.
-Scott
next prev parent reply other threads:[~2017-01-20 22:13 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-20 3:20 [U-Boot] [PATCH] armv8/fsl-layerscape: fdt: remove SYSCLK frequency fixup for ls1012a Yangbo Lu
2017-01-20 16:28 ` york sun
2017-01-20 21:35 ` Scott Wood
2017-01-20 21:38 ` york sun
2017-01-20 22:13 ` Scott Wood [this message]
2017-01-20 22:40 ` york sun
2017-02-07 17:02 ` york sun
2017-02-08 3:30 ` Y.B. Lu
2017-02-08 4:26 ` york sun
2017-04-10 7:20 ` Y.B. Lu
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