From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jagan Teki Date: Fri, 24 Feb 2017 15:45:13 +0530 Subject: [U-Boot] [PATCH v4 02/15] imx: spl: Update NAND bootmode detection bit In-Reply-To: <1487931326-10199-1-git-send-email-jagan@openedev.com> References: <1487931326-10199-1-git-send-email-jagan@openedev.com> Message-ID: <1487931326-10199-3-git-send-email-jagan@openedev.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de BOOT_CFG1[7:4] the NAND boot mode selection is done only when BOOT_CFG1[7] is 1 hence update the NAND boot mode detection bit case. This information available on Table 8-11. NAND Boot eFUSE Descriptions, from IMX6DQRM. Cc: Tim Harvey Reviewed by: Stefano Babic Signed-off-by: Jagan Teki --- arch/arm/imx-common/spl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c index 6c20f28..81fc0ca 100644 --- a/arch/arm/imx-common/spl.c +++ b/arch/arm/imx-common/spl.c @@ -63,8 +63,8 @@ u32 spl_boot_device(void) case 0x6: case 0x7: return BOOT_DEVICE_MMC1; - /* NAND Flash: 8.5.2 */ - case 0x8 ... 0xf: + /* NAND Flash: 8.5.2, Table 8-10 */ + case 0x8: return BOOT_DEVICE_NAND; } return BOOT_DEVICE_NONE; -- 1.9.1