[U-Boot] [PATCH v3 23/31] ARM: i.MX6DL: sabresd: Move DCD reginit on SPL

Jagan Teki
2017-04-07T06:10:02Z

On Fri, Apr 7, 2017 at 3:24 AM, Fabio Estevam <festevam@gmail.com> wrote:
> Hi Jagan,
>
> On Wed, Apr 5, 2017 at 4:20 PM, Jagan Teki <jagan@openedev.com> wrote:
>> From: Jagan Teki <jagan@amarulasolutions.com>
>>
>> DCD register initialization from mx6dlsabresd.cfg are moved to
>> SPL code in mx6dl_dcd_table.
>>
>> Now mx6sabresd SPL code support Dual Lite, Quad, Quad Plus.
>>
>> mx6dl_dcd_table reginit as
>> - GPR io regs
>> - DRAM io regs,
>> - MMDC Calibration io regs
>> - dram sdcke0 (0x020e04a4) and sdcke1(0x020e04a8) are not available
>> in original mx6dlsabresd.cfg but initialized to default values.
>>
>> Cc: Stefano Babic <sbabic@denx.de>
>> Cc: Fabio Estevam <fabio.estevam@nxp.com>
>> Cc: Michael Trimarchi <michael@amarulasolutions.com>
>> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
>
> Have you tested this?
>
> Last time I tried to convert imx6dl-sabresd to SPL it did not work,
> and I haven't had a chance to debug it.

I don't have a board to test, can verify it once.

thanks!
--
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.