[U-Boot] [linux-sunxi] [PATCH] sunxi: set up PLL1 on sun6i+ without use dividers

["Ondřej Jirman" <megous@megous.com>]

Hi Icenowy,

Icenowy Zheng píše v Po 10. 04. 2017 v 00:19 +0800:
> According to the researching result of Ondrej Jirman, the factor M of
> PLL1 shouldn't be used and the factor P should be used only if the
> intended frequency is lower than 288MHz. This is proven by the
> clk-sun8iw7_tbl.c in the BSP source code -- in there the M value is
> always 0 and the maximum frequency that P is not 0 is 224MHz.
> 
> As P is ignored on sun6i, it's not currently used. This patch removed
> the usage of M.
> 
> This patch is an original work by Ondrej Jirman, however, he didn't add
> a Signed-off-by tag here to his commit. So I take this code and added my
> Signed-off-by.

Well, here it is if that helps:

Signed-off-by: Ondřej Jirman <megous@megous.com>

Though this might be somewhat difficult change to make. It works
perfectly when combined with kernel that will not use dividers either.
So it's ok with BSP kernel as you noted, but it might cause trouble
(lockup on boot) with the mainline kernel unless the kernel is patched
too to not use dividers. (it does now)

Current kernel patches are here: https://megous.com/dl/h3-cpufreq/

I have only tested that it breaks if kernel is patched and u-boot is
not. I haven't tried to verify that it works the other way round, which
is important for the mainlining of these changes.

That's also the reason it's been sitting in my trees for a long time
and not being pushed out. It's not a problem when you control both u-
boot and the kernel, but that will not be a case when mainlining.
Though the current kernel will be broken anyway, when the kernel starts
to enable cpufreq/DVFS, so it might not matter either way.

TLDR:
- if we patch the kernel first without patching u-boot there will be
lockups
- if we patch u-boot first without kernel, that's not tested yet

regards,
  o.j.

> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> ---
> 
> This is a critical patch, and should be added to 2017.05.
> 
> It has been verified by the Armbian.
> 
>  arch/arm/mach-sunxi/clock_sun6i.c | 7 +++----
>  1 file changed, 3 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c
> index 4762fbf0c3..ce4291b30e 100644
> --- a/arch/arm/mach-sunxi/clock_sun6i.c
> +++ b/arch/arm/mach-sunxi/clock_sun6i.c
> @@ -98,11 +98,10 @@ void clock_set_pll1(unsigned int clk)
>  	int k = 1;
>  	int m = 1;
>  
> -	if (clk > 1152000000) {
> -		k = 2;
> -	} else if (clk > 768000000) {
> +	if (clk >= 1368000000) {
>  		k = 3;
> -		m = 2;
> +	} else if (clk >= 768000000) {
> +		k = 2;
>  	}
>  
>  	/* Switch to 24MHz clock while changing PLL1 */
> -- 
> 2.12.2
> 
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