* [U-Boot] [PATCH 1/5] sun50i: a64: Add initial Orangepi Win/WinPlus support
2017-05-25 19:35 [U-Boot] [PATCH 0/5] sun50i: a64/h5: Add orangepi boards Jagan Teki
@ 2017-05-25 19:35 ` Jagan Teki
2017-05-25 22:54 ` André Przywara
2017-05-25 19:35 ` [U-Boot] [PATCH 2/5] arm64: dts: sun50i: Add sun50i-h5.dtsi Jagan Teki
` (4 subsequent siblings)
5 siblings, 1 reply; 10+ messages in thread
From: Jagan Teki @ 2017-05-25 19:35 UTC (permalink / raw)
To: u-boot
From: Jagan Teki <jagan@amarulasolutions.com>
Orangepi Win/WinPlus is an open-source single-board computer
using the Allwinner A64 SOC.
A64 Orangepi Win/WinPlus has
- A64 Quad-core Cortex-A53 64bit
- 1GB(Win)/2GB(Win Plus) DDR3 SDRAM
- Debug TTL UART
- Four USB 2.0
- HDMI
- LCD
- Audio and MIC
- Wifi + BT
- IR receiver
- 5V DC power supply
http://www.orangepi.org/OrangePiWin_WinPlus/
Boot from MMC:
--------------
U-Boot SPL 2017.05-00662-ga3f4c05-dirty (May 25 2017 - 13:32:53)
DRAM: 1024 MiB
Trying to boot from MMC1
NOTICE: BL3-1: Running on A64/H64 (1689) in SRAM A2 (@0x44000)
NOTICE: Configuring SPC Controller
NOTICE: BL3-1: v1.0(debug):aa75c8d
NOTICE: BL3-1: Built : 18:28:27, May 24 2017
NOTICE: Configuring AXP PMIC
NOTICE: PMIC: setup successful
INFO: BL3-1: Initializing runtime services
INFO: BL3-1: Preparing for EL3 exit to normal world
INFO: BL3-1: Next image address: 0x4a000000, SPSR: 0x3c9
U-Boot 2017.05-00662-ga3f4c05-dirty (May 25 2017 - 13:32:53 +0000) Allwinner Technology
CPU: Allwinner A64 (SUN50I)
Model: OrangePi Win/Win Plus
DRAM: 1 GiB
MMC: SUNXI SD/MMC: 0
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: No ethernet found.
starting USB...
USB0: USB EHCI 1.00
USB1: USB OHCI 1.0
scanning bus 0 for devices... 1 USB Device(s) found
scanning usb for storage devices... 0 Storage Device(s) found
Hit any key to stop autoboot: 0
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/sun50i-a64-orangepi-win.dts | 102 +++++++++++++++++++++++++++++++
board/sunxi/MAINTAINERS | 5 ++
configs/orangepi_win_defconfig | 16 +++++
4 files changed, 124 insertions(+)
create mode 100644 arch/arm/dts/sun50i-a64-orangepi-win.dts
create mode 100644 configs/orangepi_win_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index a3bed3d..2251edf 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -317,6 +317,7 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \
dtb-$(CONFIG_MACH_SUN50I_H5) += \
sun50i-h5-orangepi-pc2.dtb
dtb-$(CONFIG_MACH_SUN50I) += \
+ sun50i-a64-orangepi-win.dtb \
sun50i-a64-pine64-plus.dtb \
sun50i-a64-pine64.dtb
dtb-$(CONFIG_MACH_SUN9I) += \
diff --git a/arch/arm/dts/sun50i-a64-orangepi-win.dts b/arch/arm/dts/sun50i-a64-orangepi-win.dts
new file mode 100644
index 0000000..c1bfa88
--- /dev/null
+++ b/arch/arm/dts/sun50i-a64-orangepi-win.dts
@@ -0,0 +1,102 @@
+/*
+ * Copyright (C) 2017 Jagan Teki <jteki@openedev.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "OrangePi Win/Win Plus";
+ compatible = "xunlong,orangepi-win", "allwinner,sun50i-a64";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ soc {
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+ };
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins>, <&mmc0_default_cd_pin>;
+ vmmc-supply = <®_vcc3v3>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
+ cd-inverted;
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index e4f6825..ddb0b54 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -267,6 +267,11 @@ M: Andre Przywara <andre.przywara@arm.com>
S: Maintained
F: configs/orangepi_pc2_defconfig
+ORANGEPI WIN/WIN PLUS BOARD
+M: Jagan Teki <jagan@amarulasolutions.com>
+S: Maintained
+F: configs/orangepi_win_defconfig
+
PINE64 BOARDS
M: Andre Przywara <andre.przywara@arm.com>
S: Maintained
diff --git a/configs/orangepi_win_defconfig b/configs/orangepi_win_defconfig
new file mode 100644
index 0000000..a090ea5
--- /dev/null
+++ b/configs/orangepi_win_defconfig
@@ -0,0 +1,16 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN50I=y
+CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-orangepi-win"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_CONSOLE_MUX=y
+CONFIG_SPL=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
--
2.7.4
^ permalink raw reply related [flat|nested] 10+ messages in thread* [U-Boot] [PATCH 1/5] sun50i: a64: Add initial Orangepi Win/WinPlus support
2017-05-25 19:35 ` [U-Boot] [PATCH 1/5] sun50i: a64: Add initial Orangepi Win/WinPlus support Jagan Teki
@ 2017-05-25 22:54 ` André Przywara
0 siblings, 0 replies; 10+ messages in thread
From: André Przywara @ 2017-05-25 22:54 UTC (permalink / raw)
To: u-boot
On 25/05/17 20:35, Jagan Teki wrote:
> From: Jagan Teki <jagan@amarulasolutions.com>
>
> Orangepi Win/WinPlus is an open-source single-board computer
> using the Allwinner A64 SOC.
>
> A64 Orangepi Win/WinPlus has
> - A64 Quad-core Cortex-A53 64bit
> - 1GB(Win)/2GB(Win Plus) DDR3 SDRAM
> - Debug TTL UART
> - Four USB 2.0
> - HDMI
> - LCD
> - Audio and MIC
> - Wifi + BT
> - IR receiver
> - 5V DC power supply
>
> http://www.orangepi.org/OrangePiWin_WinPlus/
Do you have a link to some schematics?
> Boot from MMC:
> --------------
> U-Boot SPL 2017.05-00662-ga3f4c05-dirty (May 25 2017 - 13:32:53)
> DRAM: 1024 MiB
> Trying to boot from MMC1
> NOTICE: BL3-1: Running on A64/H64 (1689) in SRAM A2 (@0x44000)
> NOTICE: Configuring SPC Controller
> NOTICE: BL3-1: v1.0(debug):aa75c8d
> NOTICE: BL3-1: Built : 18:28:27, May 24 2017
> NOTICE: Configuring AXP PMIC
> NOTICE: PMIC: setup successful
> INFO: BL3-1: Initializing runtime services
> INFO: BL3-1: Preparing for EL3 exit to normal world
> INFO: BL3-1: Next image address: 0x4a000000, SPSR: 0x3c9
>
> U-Boot 2017.05-00662-ga3f4c05-dirty (May 25 2017 - 13:32:53 +0000) Allwinner Technology
>
> CPU: Allwinner A64 (SUN50I)
> Model: OrangePi Win/Win Plus
> DRAM: 1 GiB
> MMC: SUNXI SD/MMC: 0
> *** Warning - bad CRC, using default environment
>
> In: serial
> Out: serial
> Err: serial
> Net: No ethernet found.
Any reason you didn't enable this?
If you have applied my A64/Pine64 DT update (v3 is a single patch now),
you should copy the new sun50i-a64-pine64-plus-u-boot.dtsi to
sun50i-a64-orangepi-win-u-boot.dtsi, that should do the trick.
If the Ethernet uses another GPIO or AXP line to enable the PHY, let me
know.
> starting USB...
> USB0: USB EHCI 1.00
> USB1: USB OHCI 1.0
> scanning bus 0 for devices... 1 USB Device(s) found
> scanning usb for storage devices... 0 Storage Device(s) found
> Hit any key to stop autoboot: 0
>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
> arch/arm/dts/Makefile | 1 +
> arch/arm/dts/sun50i-a64-orangepi-win.dts | 102 +++++++++++++++++++++++++++++++
In general we might eventually want to wait what the discussion on the
Linux side ends up like, then copy this .dts file.
> board/sunxi/MAINTAINERS | 5 ++
> configs/orangepi_win_defconfig | 16 +++++
> 4 files changed, 124 insertions(+)
> create mode 100644 arch/arm/dts/sun50i-a64-orangepi-win.dts
> create mode 100644 configs/orangepi_win_defconfig
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index a3bed3d..2251edf 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -317,6 +317,7 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \
> dtb-$(CONFIG_MACH_SUN50I_H5) += \
> sun50i-h5-orangepi-pc2.dtb
> dtb-$(CONFIG_MACH_SUN50I) += \
> + sun50i-a64-orangepi-win.dtb \
> sun50i-a64-pine64-plus.dtb \
> sun50i-a64-pine64.dtb
> dtb-$(CONFIG_MACH_SUN9I) += \
> diff --git a/arch/arm/dts/sun50i-a64-orangepi-win.dts b/arch/arm/dts/sun50i-a64-orangepi-win.dts
> new file mode 100644
> index 0000000..c1bfa88
> --- /dev/null
> +++ b/arch/arm/dts/sun50i-a64-orangepi-win.dts
> @@ -0,0 +1,102 @@
> +/*
> + * Copyright (C) 2017 Jagan Teki <jteki@openedev.com>
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This library is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of the
> + * License, or (at your option) any later version.
> + *
> + * This library is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +
> +#include "sun50i-a64.dtsi"
> +
> +#include <dt-bindings/gpio/gpio.h>
> +
> +/ {
> + model = "OrangePi Win/Win Plus";
> + compatible = "xunlong,orangepi-win", "allwinner,sun50i-a64";
> +
> + aliases {
> + serial0 = &uart0;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + soc {
> + reg_vcc3v3: vcc3v3 {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc3v3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + };
> + };
> +};
> +
> +&mmc0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc0_pins>, <&mmc0_default_cd_pin>;
> + vmmc-supply = <®_vcc3v3>;
> + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
> + cd-inverted;
> + status = "okay";
> +};
> +
> +&uart0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart0_pins_a>;
> + status = "okay";
> +};
> +
> +&i2c1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c1_pins>;
> + status = "okay";
> +};
> +
> +&usbphy {
> + status = "okay";
> +};
> +
> +&ohci1 {
> + status = "okay";
> +};
> +
> +&ehci1 {
> + status = "okay";
> +};
> diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
> index e4f6825..ddb0b54 100644
> --- a/board/sunxi/MAINTAINERS
> +++ b/board/sunxi/MAINTAINERS
> @@ -267,6 +267,11 @@ M: Andre Przywara <andre.przywara@arm.com>
> S: Maintained
> F: configs/orangepi_pc2_defconfig
>
> +ORANGEPI WIN/WIN PLUS BOARD
> +M: Jagan Teki <jagan@amarulasolutions.com>
> +S: Maintained
> +F: configs/orangepi_win_defconfig
> +
> PINE64 BOARDS
> M: Andre Przywara <andre.przywara@arm.com>
> S: Maintained
> diff --git a/configs/orangepi_win_defconfig b/configs/orangepi_win_defconfig
> new file mode 100644
> index 0000000..a090ea5
> --- /dev/null
> +++ b/configs/orangepi_win_defconfig
> @@ -0,0 +1,16 @@
> +CONFIG_ARM=y
> +CONFIG_ARCH_SUNXI=y
> +CONFIG_MACH_SUN50I=y
> +CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
> +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-orangepi-win"
> +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
> +CONFIG_CONSOLE_MUX=y
> +CONFIG_SPL=y
> +# CONFIG_CMD_IMLS is not set
> +# CONFIG_CMD_FLASH is not set
> +# CONFIG_CMD_FPGA is not set
> +# CONFIG_SPL_DOS_PARTITION is not set
> +# CONFIG_SPL_ISO_PARTITION is not set
> +# CONFIG_SPL_EFI_PARTITION is not set
> +CONFIG_SUN8I_EMAC=y
> +CONFIG_USB_EHCI_HCD=y
This board has SPI flash, so you should absolutely enable the SPL SPI
options, as this allows booting from SPI flash, which is a really cool
feature. Look at the OrangePi PC 2 config for the needed lines.
So in general this is basically identical to the Pine64 defconfig, apart
from the device tree. With the latest U-Boot HEAD we can now put the DT
name in the SPL header (for instance in the SPI flash!), add the new DT
name to the CONFIG_OF_LIST option and get away without an extra
defconfig. This allows to use the very same U-Boot image for the Pine64
and this OrangePi. The SPL board selector function would lookup the
board DT name from the SPL header and load the respective .dtb from the
FIT image.
Admittedly there is some tooling missing at the moment to make this
really a smooth experience, but I wonder if we should explore this
approach further. A firmware update tool could read the existing DT name
from the current SPL header, update all of the SPL, FIT, ATF and U-Boot
binaries, then write that very same DT name back into the SPL header. I
have started to hack on something like this, let me know if that sounds
interesting.
Cheers,
Andre.
^ permalink raw reply [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH 2/5] arm64: dts: sun50i: Add sun50i-h5.dtsi
2017-05-25 19:35 [U-Boot] [PATCH 0/5] sun50i: a64/h5: Add orangepi boards Jagan Teki
2017-05-25 19:35 ` [U-Boot] [PATCH 1/5] sun50i: a64: Add initial Orangepi Win/WinPlus support Jagan Teki
@ 2017-05-25 19:35 ` Jagan Teki
2017-05-25 23:01 ` André Przywara
2017-05-25 19:35 ` [U-Boot] [PATCH 3/5] arm64: dts: sun50i: h5: orangepi-pc2: Use GPIO flag binding macro Jagan Teki
` (3 subsequent siblings)
5 siblings, 1 reply; 10+ messages in thread
From: Jagan Teki @ 2017-05-25 19:35 UTC (permalink / raw)
To: u-boot
From: Jagan Teki <jagan@amarulasolutions.com>
The Allwinner H5 SoC is pin-compatible to the H3 SoC,
but uses Cortex-A53 cores instead.
So move the shared cpu based and peripherals nodes into
sun50i-h5.dtsi so, that it can shared among the sun50i-h5
board dts files.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 34 +-------------
arch/arm/dts/sun50i-h5.dtsi | 79 +++++++++++++++++++++++++++++++++
2 files changed, 80 insertions(+), 33 deletions(-)
create mode 100644 arch/arm/dts/sun50i-h5.dtsi
diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
index de60f78..81594e6 100644
--- a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
+++ b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
@@ -42,40 +42,12 @@
/dts-v1/;
-#include "sun8i-h3.dtsi"
+#include "sun50i-h5.dtsi"
/ {
model = "OrangePi PC 2";
compatible = "xunlong,orangepi-pc-2", "allwinner,sun50i-h5";
- cpus {
- cpu at 0 {
- compatible = "arm,cortex-a53", "arm,armv8";
- enable-method = "psci";
- };
- cpu at 1 {
- compatible = "arm,cortex-a53", "arm,armv8";
- enable-method = "psci";
- };
- cpu at 2 {
- compatible = "arm,cortex-a53", "arm,armv8";
- enable-method = "psci";
- };
- cpu at 3 {
- compatible = "arm,cortex-a53", "arm,armv8";
- enable-method = "psci";
- };
- };
-
- psci {
- compatible = "arm,psci-0.2";
- method = "smc";
- };
-
- timer {
- compatible = "arm,armv8-timer";
- };
-
chosen {
stdout-path = "serial0:115200n8";
};
@@ -99,10 +71,6 @@
};
};
-&gic {
- compatible = "arm,gic-400";
-};
-
&mmc0 {
compatible = "allwinner,sun50i-h5-mmc",
"allwinner,sun50i-a64-mmc",
diff --git a/arch/arm/dts/sun50i-h5.dtsi b/arch/arm/dts/sun50i-h5.dtsi
new file mode 100644
index 0000000..df76a07
--- /dev/null
+++ b/arch/arm/dts/sun50i-h5.dtsi
@@ -0,0 +1,79 @@
+/*
+ * Copyright (c) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "sun8i-h3.dtsi"
+
+/ {
+ cpus {
+ cpu at 0 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ enable-method = "psci";
+ };
+ cpu at 1 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ enable-method = "psci";
+ };
+ cpu at 2 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ enable-method = "psci";
+ };
+ cpu at 3 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ enable-method = "psci";
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ };
+};
+
+&gic {
+ compatible = "arm,gic-400";
+};
--
2.7.4
^ permalink raw reply related [flat|nested] 10+ messages in thread* [U-Boot] [PATCH 2/5] arm64: dts: sun50i: Add sun50i-h5.dtsi
2017-05-25 19:35 ` [U-Boot] [PATCH 2/5] arm64: dts: sun50i: Add sun50i-h5.dtsi Jagan Teki
@ 2017-05-25 23:01 ` André Przywara
0 siblings, 0 replies; 10+ messages in thread
From: André Przywara @ 2017-05-25 23:01 UTC (permalink / raw)
To: u-boot
On 25/05/17 20:35, Jagan Teki wrote:
> From: Jagan Teki <jagan@amarulasolutions.com>
>
> The Allwinner H5 SoC is pin-compatible to the H3 SoC,
> but uses Cortex-A53 cores instead.
>
> So move the shared cpu based and peripherals nodes into
> sun50i-h5.dtsi so, that it can shared among the sun50i-h5
> board dts files.
That looks like another deviation from the Linux DTs, right?
Yesterdays I tried to update U-Boot with the Linux DTs, but this gets
nasty because of the entanglement with the H3 and the non-upstream
Ethernet support.
Following the new scheme we would need to have a ...-u-boot.dtsi with
the Ethernet nodes for *each* board, as some H3 boards use 100Mbit, some
have a Gbit PHY, so we can't use a single file to cover both.
Not sure if that means we use two .dtsi files and symbolic links or
whether we want to wait until we can have multiple, possibly shared
-u-boot.dtsi files to tackle this.
Cheers,
Andre.
>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
> arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 34 +-------------
> arch/arm/dts/sun50i-h5.dtsi | 79 +++++++++++++++++++++++++++++++++
> 2 files changed, 80 insertions(+), 33 deletions(-)
> create mode 100644 arch/arm/dts/sun50i-h5.dtsi
>
> diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
> index de60f78..81594e6 100644
> --- a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
> +++ b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
> @@ -42,40 +42,12 @@
>
> /dts-v1/;
>
> -#include "sun8i-h3.dtsi"
> +#include "sun50i-h5.dtsi"
>
> / {
> model = "OrangePi PC 2";
> compatible = "xunlong,orangepi-pc-2", "allwinner,sun50i-h5";
>
> - cpus {
> - cpu at 0 {
> - compatible = "arm,cortex-a53", "arm,armv8";
> - enable-method = "psci";
> - };
> - cpu at 1 {
> - compatible = "arm,cortex-a53", "arm,armv8";
> - enable-method = "psci";
> - };
> - cpu at 2 {
> - compatible = "arm,cortex-a53", "arm,armv8";
> - enable-method = "psci";
> - };
> - cpu at 3 {
> - compatible = "arm,cortex-a53", "arm,armv8";
> - enable-method = "psci";
> - };
> - };
> -
> - psci {
> - compatible = "arm,psci-0.2";
> - method = "smc";
> - };
> -
> - timer {
> - compatible = "arm,armv8-timer";
> - };
> -
> chosen {
> stdout-path = "serial0:115200n8";
> };
> @@ -99,10 +71,6 @@
> };
> };
>
> -&gic {
> - compatible = "arm,gic-400";
> -};
> -
> &mmc0 {
> compatible = "allwinner,sun50i-h5-mmc",
> "allwinner,sun50i-a64-mmc",
> diff --git a/arch/arm/dts/sun50i-h5.dtsi b/arch/arm/dts/sun50i-h5.dtsi
> new file mode 100644
> index 0000000..df76a07
> --- /dev/null
> +++ b/arch/arm/dts/sun50i-h5.dtsi
> @@ -0,0 +1,79 @@
> +/*
> + * Copyright (c) 2016 ARM Ltd.
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This library is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of the
> + * License, or (at your option) any later version.
> + *
> + * This library is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +
> +#include "sun8i-h3.dtsi"
> +
> +/ {
> + cpus {
> + cpu at 0 {
> + compatible = "arm,cortex-a53", "arm,armv8";
> + enable-method = "psci";
> + };
> + cpu at 1 {
> + compatible = "arm,cortex-a53", "arm,armv8";
> + enable-method = "psci";
> + };
> + cpu at 2 {
> + compatible = "arm,cortex-a53", "arm,armv8";
> + enable-method = "psci";
> + };
> + cpu at 3 {
> + compatible = "arm,cortex-a53", "arm,armv8";
> + enable-method = "psci";
> + };
> + };
> +
> + psci {
> + compatible = "arm,psci-0.2";
> + method = "smc";
> + };
> +
> + timer {
> + compatible = "arm,armv8-timer";
> + };
> +};
> +
> +&gic {
> + compatible = "arm,gic-400";
> +};
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH 3/5] arm64: dts: sun50i: h5: orangepi-pc2: Use GPIO flag binding macro
2017-05-25 19:35 [U-Boot] [PATCH 0/5] sun50i: a64/h5: Add orangepi boards Jagan Teki
2017-05-25 19:35 ` [U-Boot] [PATCH 1/5] sun50i: a64: Add initial Orangepi Win/WinPlus support Jagan Teki
2017-05-25 19:35 ` [U-Boot] [PATCH 2/5] arm64: dts: sun50i: Add sun50i-h5.dtsi Jagan Teki
@ 2017-05-25 19:35 ` Jagan Teki
2017-05-25 19:35 ` [U-Boot] [PATCH 4/5] sun50i: h5: Add initial Orangepi Prime support Jagan Teki
` (2 subsequent siblings)
5 siblings, 0 replies; 10+ messages in thread
From: Jagan Teki @ 2017-05-25 19:35 UTC (permalink / raw)
To: u-boot
From: Jagan Teki <jagan@amarulasolutions.com>
Instead of defining numerical value on GPIO flag
better to use existing binding macro.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
index 81594e6..780d59a 100644
--- a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
+++ b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
@@ -44,6 +44,8 @@
#include "sun50i-h5.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
/ {
model = "OrangePi PC 2";
compatible = "xunlong,orangepi-pc-2", "allwinner,sun50i-h5";
@@ -79,7 +81,7 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 5 6 0>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
cd-inverted;
status = "okay";
};
--
2.7.4
^ permalink raw reply related [flat|nested] 10+ messages in thread* [U-Boot] [PATCH 4/5] sun50i: h5: Add initial Orangepi Prime support
2017-05-25 19:35 [U-Boot] [PATCH 0/5] sun50i: a64/h5: Add orangepi boards Jagan Teki
` (2 preceding siblings ...)
2017-05-25 19:35 ` [U-Boot] [PATCH 3/5] arm64: dts: sun50i: h5: orangepi-pc2: Use GPIO flag binding macro Jagan Teki
@ 2017-05-25 19:35 ` Jagan Teki
2017-05-25 19:35 ` [U-Boot] [PATCH 5/5] sun50i: h5: Add initial Orangepi Zero Plus 2 support Jagan Teki
2017-06-02 18:00 ` [U-Boot] [PATCH 0/5] sun50i: a64/h5: Add orangepi boards Jagan Teki
5 siblings, 0 replies; 10+ messages in thread
From: Jagan Teki @ 2017-05-25 19:35 UTC (permalink / raw)
To: u-boot
From: Jagan Teki <jagan@amarulasolutions.com>
Orangepi Prime is an open-source single-board computer
using the Allwinner h5 SOC.
H5 Orangepi Prime has
- Quad-core Cortex-A53
- 2GB DDR3
- Debug TTL UART
- 1000M/100M Ethernet RJ45
- Three USB 2.0
- HDMI
- Audio and MIC
- Wifi + BT
- IR receiver
- HDMI
- Wifi + BT
http://www.orangepi.org/OrangePiPrime/
Boot from MMC:
-------------
U-Boot SPL 2017.05-00662-ga3f4c05-dirty (May 25 2017 - 13:30:14)
DRAM: 2048 MiB
Trying to boot from MMC1
NOTICE: BL3-1: Running on H5 (1718) in SRAM A2 (@0x44000)
NOTICE: Configuring SPC Controller
NOTICE: BL3-1: v1.0(debug):aa75c8d
NOTICE: BL3-1: Built : 18:28:27, May 24 2017
INFO: BL3-1: Initializing runtime services
INFO: BL3-1: Preparing for EL3 exit to normal world
INFO: BL3-1: Next image address: 0x4a000000, SPSR: 0x3c9
U-Boot 2017.05-00662-ga3f4c05-dirty (May 25 2017 - 13:30:14 +0000) Allwinner Technology
CPU: Allwinner H5 (SUN50I)
Model: OrangePi Prime
DRAM: 2 GiB
MMC: SUNXI SD/MMC: 0
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: phy interface7
eth0: ethernet at 1c30000
starting USB...
USB0: USB EHCI 1.00
USB1: USB OHCI 1.0
scanning bus 0 for devices... 1 USB Device(s) found
scanning usb for storage devices... 0 Storage Device(s) found
Hit any key to stop autoboot: 0
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/sun50i-h5-orangepi-prime.dts | 104 ++++++++++++++++++++++++++++++
board/sunxi/MAINTAINERS | 5 ++
configs/orangepi_prime_defconfig | 17 +++++
4 files changed, 128 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/sun50i-h5-orangepi-prime.dts
create mode 100644 configs/orangepi_prime_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 2251edf..54978cf 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -315,7 +315,8 @@ dtb-$(CONFIG_MACH_SUN8I_R40) += \
dtb-$(CONFIG_MACH_SUN8I_V3S) += \
sun8i-v3s-licheepi-zero.dtb
dtb-$(CONFIG_MACH_SUN50I_H5) += \
- sun50i-h5-orangepi-pc2.dtb
+ sun50i-h5-orangepi-pc2.dtb \
+ sun50i-h5-orangepi-prime.dtb
dtb-$(CONFIG_MACH_SUN50I) += \
sun50i-a64-orangepi-win.dtb \
sun50i-a64-pine64-plus.dtb \
diff --git a/arch/arm/dts/sun50i-h5-orangepi-prime.dts b/arch/arm/dts/sun50i-h5-orangepi-prime.dts
new file mode 100644
index 0000000..67eade7
--- /dev/null
+++ b/arch/arm/dts/sun50i-h5-orangepi-prime.dts
@@ -0,0 +1,104 @@
+/*
+ * Copyright (C) 2017 Jagan Teki <jteki@openedev.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "OrangePi Prime";
+ compatible = "xunlong,orangepi-prime", "allwinner,sun50i-h5";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory {
+ reg = <0x40000000 0x80000000>;
+ };
+
+ soc {
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+ };
+};
+
+&mmc0 {
+ compatible = "allwinner,sun50i-h5-mmc",
+ "allwinner,sun50i-a64-mmc",
+ "allwinner,sun5i-a13-mmc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
+ cd-inverted;
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index ddb0b54..2d140d1 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -267,6 +267,11 @@ M: Andre Przywara <andre.przywara@arm.com>
S: Maintained
F: configs/orangepi_pc2_defconfig
+ORANGEPI PRIME BOARD
+M: Jagan Teki <jagan@amarulasolutions.com>
+S: Maintained
+F: configs/orangepi_prime_defconfig
+
ORANGEPI WIN/WIN PLUS BOARD
M: Jagan Teki <jagan@amarulasolutions.com>
S: Maintained
diff --git a/configs/orangepi_prime_defconfig b/configs/orangepi_prime_defconfig
new file mode 100644
index 0000000..ac4bff5
--- /dev/null
+++ b/configs/orangepi_prime_defconfig
@@ -0,0 +1,17 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN50I_H5=y
+CONFIG_DRAM_CLK=672
+CONFIG_DRAM_ZQ=3881977
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-prime"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_CONSOLE_MUX=y
+CONFIG_SPL=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
--
2.7.4
^ permalink raw reply related [flat|nested] 10+ messages in thread* [U-Boot] [PATCH 5/5] sun50i: h5: Add initial Orangepi Zero Plus 2 support
2017-05-25 19:35 [U-Boot] [PATCH 0/5] sun50i: a64/h5: Add orangepi boards Jagan Teki
` (3 preceding siblings ...)
2017-05-25 19:35 ` [U-Boot] [PATCH 4/5] sun50i: h5: Add initial Orangepi Prime support Jagan Teki
@ 2017-05-25 19:35 ` Jagan Teki
2017-05-25 23:08 ` André Przywara
2017-06-02 18:00 ` [U-Boot] [PATCH 0/5] sun50i: a64/h5: Add orangepi boards Jagan Teki
5 siblings, 1 reply; 10+ messages in thread
From: Jagan Teki @ 2017-05-25 19:35 UTC (permalink / raw)
To: u-boot
From: Jagan Teki <jagan@amarulasolutions.com>
Orangepi Zero Plus 2 is an open-source single-board computer
using the Allwinner h5 SOC.
H5 Orangepi Zero Plus 2 has
- Quad-core Cortex-A53
- 512MB DDR3
- Debug TTL UART
- HDMI
- Wifi + BT
- OTG+power supply
http://www.orangepi.org/OrangePiZeroPlus2/
Boot from MMC:
--------------
U-Boot SPL 2017.05-00663-g51233ac-dirty (May 25 2017 - 16:18:41)
DRAM: 512 MiB
Trying to boot from MMC1
NOTICE: BL3-1: Running on H5 (1718) in SRAM A2 (@0x44000)
NOTICE: Configuring SPC Controller
NOTICE: BL3-1: v1.0(debug):aa75c8d
NOTICE: BL3-1: Built : 18:28:27, May 24 2017
INFO: BL3-1: Initializing runtime services
INFO: BL3-1: Preparing for EL3 exit to normal world
INFO: BL3-1: Next image address: 0x4a000000, SPSR: 0x3c9
U-Boot 2017.05-00663-g51233ac-dirty (May 25 2017 - 16:18:41 +0000) Allwinner Technology
CPU: Allwinner H5 (SUN50I)
Model: OrangePi Zero Plus2
DRAM: 512 MiB
MMC: SUNXI SD/MMC: 0
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: phy interface7
eth0: ethernet at 1c30000
starting USB...
USB0: USB EHCI 1.00
USB1: USB OHCI 1.0
scanning bus 0 for devices... 1 USB Device(s) found
scanning usb for storage devices... 0 Storage Device(s) found
Hit any key to stop autoboot: 0
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts | 93 ++++++++++++++++++++++++++
board/sunxi/MAINTAINERS | 5 ++
configs/orangepi_zero_plus2_defconfig | 17 +++++
4 files changed, 117 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts
create mode 100644 configs/orangepi_zero_plus2_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 54978cf..a59395b 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -316,7 +316,8 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \
sun8i-v3s-licheepi-zero.dtb
dtb-$(CONFIG_MACH_SUN50I_H5) += \
sun50i-h5-orangepi-pc2.dtb \
- sun50i-h5-orangepi-prime.dtb
+ sun50i-h5-orangepi-prime.dtb \
+ sun50i-h5-orangepi-zero-plus2.dtb
dtb-$(CONFIG_MACH_SUN50I) += \
sun50i-a64-orangepi-win.dtb \
sun50i-a64-pine64-plus.dtb \
diff --git a/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts b/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts
new file mode 100644
index 0000000..f17a7bb
--- /dev/null
+++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts
@@ -0,0 +1,93 @@
+/*
+ * Copyright (C) 2017 Jagan Teki <jteki@openedev.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+
+/ {
+ model = "OrangePi Zero Plus2";
+ compatible = "xunlong,orangepi-zero-plus2", "allwinner,sun50i-h5";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory {
+ reg = <0x40000000 0x20000000>;
+ };
+
+ soc {
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+ };
+};
+
+&mmc0 {
+ compatible = "allwinner,sun50i-h5-mmc",
+ "allwinner,sun50i-a64-mmc",
+ "allwinner,sun5i-a13-mmc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
+ cd-inverted;
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index 2d140d1..4bcfe9b 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -262,6 +262,11 @@ M: Icenowy Zheng <icenowy@aosc.xyz>
S: Maintained
F: configs/orangepi_zero_defconfig
+ORANGEPI ZERO PLUS 2 BOARD
+M: Jagan Teki <jagan@amarulasolutions.com>
+S: Maintained
+F: configs/orangepi_zero_plus2_defconfig
+
ORANGEPI PC 2 BOARD
M: Andre Przywara <andre.przywara@arm.com>
S: Maintained
diff --git a/configs/orangepi_zero_plus2_defconfig b/configs/orangepi_zero_plus2_defconfig
new file mode 100644
index 0000000..c069cee
--- /dev/null
+++ b/configs/orangepi_zero_plus2_defconfig
@@ -0,0 +1,17 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN50I_H5=y
+CONFIG_DRAM_CLK=672
+CONFIG_DRAM_ZQ=3881977
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus2"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_CONSOLE_MUX=y
+CONFIG_SPL=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
--
2.7.4
^ permalink raw reply related [flat|nested] 10+ messages in thread* [U-Boot] [PATCH 5/5] sun50i: h5: Add initial Orangepi Zero Plus 2 support
2017-05-25 19:35 ` [U-Boot] [PATCH 5/5] sun50i: h5: Add initial Orangepi Zero Plus 2 support Jagan Teki
@ 2017-05-25 23:08 ` André Przywara
0 siblings, 0 replies; 10+ messages in thread
From: André Przywara @ 2017-05-25 23:08 UTC (permalink / raw)
To: u-boot
On 25/05/17 20:35, Jagan Teki wrote:
> From: Jagan Teki <jagan@amarulasolutions.com>
>
> Orangepi Zero Plus 2 is an open-source single-board computer
> using the Allwinner h5 SOC.
>
> H5 Orangepi Zero Plus 2 has
> - Quad-core Cortex-A53
> - 512MB DDR3
> - Debug TTL UART
> - HDMI
> - Wifi + BT
> - OTG+power supply
What about the eMMC? The link below says it features 8GB of it.
So you should have the appropriate DT node and the defconfig option to
allow booting from it.
> http://www.orangepi.org/OrangePiZeroPlus2/
But in general I think this is somewhat gated by the general H5 DT issue
I mentioned in the other mail.
Cheers,
Andre.
>
> Boot from MMC:
> --------------
> U-Boot SPL 2017.05-00663-g51233ac-dirty (May 25 2017 - 16:18:41)
> DRAM: 512 MiB
> Trying to boot from MMC1
> NOTICE: BL3-1: Running on H5 (1718) in SRAM A2 (@0x44000)
> NOTICE: Configuring SPC Controller
> NOTICE: BL3-1: v1.0(debug):aa75c8d
> NOTICE: BL3-1: Built : 18:28:27, May 24 2017
> INFO: BL3-1: Initializing runtime services
> INFO: BL3-1: Preparing for EL3 exit to normal world
> INFO: BL3-1: Next image address: 0x4a000000, SPSR: 0x3c9
>
> U-Boot 2017.05-00663-g51233ac-dirty (May 25 2017 - 16:18:41 +0000) Allwinner Technology
>
> CPU: Allwinner H5 (SUN50I)
> Model: OrangePi Zero Plus2
> DRAM: 512 MiB
> MMC: SUNXI SD/MMC: 0
> *** Warning - bad CRC, using default environment
>
> In: serial
> Out: serial
> Err: serial
> Net: phy interface7
> eth0: ethernet at 1c30000
> starting USB...
> USB0: USB EHCI 1.00
> USB1: USB OHCI 1.0
> scanning bus 0 for devices... 1 USB Device(s) found
> scanning usb for storage devices... 0 Storage Device(s) found
> Hit any key to stop autoboot: 0
>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
> arch/arm/dts/Makefile | 3 +-
> arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts | 93 ++++++++++++++++++++++++++
> board/sunxi/MAINTAINERS | 5 ++
> configs/orangepi_zero_plus2_defconfig | 17 +++++
> 4 files changed, 117 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts
> create mode 100644 configs/orangepi_zero_plus2_defconfig
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 54978cf..a59395b 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -316,7 +316,8 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \
> sun8i-v3s-licheepi-zero.dtb
> dtb-$(CONFIG_MACH_SUN50I_H5) += \
> sun50i-h5-orangepi-pc2.dtb \
> - sun50i-h5-orangepi-prime.dtb
> + sun50i-h5-orangepi-prime.dtb \
> + sun50i-h5-orangepi-zero-plus2.dtb
> dtb-$(CONFIG_MACH_SUN50I) += \
> sun50i-a64-orangepi-win.dtb \
> sun50i-a64-pine64-plus.dtb \
> diff --git a/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts b/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts
> new file mode 100644
> index 0000000..f17a7bb
> --- /dev/null
> +++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts
> @@ -0,0 +1,93 @@
> +/*
> + * Copyright (C) 2017 Jagan Teki <jteki@openedev.com>
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This library is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of the
> + * License, or (at your option) any later version.
> + *
> + * This library is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +
> +#include "sun50i-h5.dtsi"
> +
> +#include <dt-bindings/gpio/gpio.h>
> +
> +
> +/ {
> + model = "OrangePi Zero Plus2";
> + compatible = "xunlong,orangepi-zero-plus2", "allwinner,sun50i-h5";
> +
> + aliases {
> + serial0 = &uart0;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + memory {
> + reg = <0x40000000 0x20000000>;
> + };
> +
> + soc {
> + reg_vcc3v3: vcc3v3 {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc3v3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + };
> + };
> +};
> +
> +&mmc0 {
> + compatible = "allwinner,sun50i-h5-mmc",
> + "allwinner,sun50i-a64-mmc",
> + "allwinner,sun5i-a13-mmc";
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
> + vmmc-supply = <®_vcc3v3>;
> + bus-width = <4>;
> + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
> + cd-inverted;
> + status = "okay";
> +};
> +
> +&uart0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart0_pins_a>;
> + status = "okay";
> +};
> diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
> index 2d140d1..4bcfe9b 100644
> --- a/board/sunxi/MAINTAINERS
> +++ b/board/sunxi/MAINTAINERS
> @@ -262,6 +262,11 @@ M: Icenowy Zheng <icenowy@aosc.xyz>
> S: Maintained
> F: configs/orangepi_zero_defconfig
>
> +ORANGEPI ZERO PLUS 2 BOARD
> +M: Jagan Teki <jagan@amarulasolutions.com>
> +S: Maintained
> +F: configs/orangepi_zero_plus2_defconfig
> +
> ORANGEPI PC 2 BOARD
> M: Andre Przywara <andre.przywara@arm.com>
> S: Maintained
> diff --git a/configs/orangepi_zero_plus2_defconfig b/configs/orangepi_zero_plus2_defconfig
> new file mode 100644
> index 0000000..c069cee
> --- /dev/null
> +++ b/configs/orangepi_zero_plus2_defconfig
> @@ -0,0 +1,17 @@
> +CONFIG_ARM=y
> +CONFIG_ARCH_SUNXI=y
> +CONFIG_MACH_SUN50I_H5=y
> +CONFIG_DRAM_CLK=672
> +CONFIG_DRAM_ZQ=3881977
> +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus2"
> +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
> +CONFIG_CONSOLE_MUX=y
> +CONFIG_SPL=y
> +# CONFIG_CMD_IMLS is not set
> +# CONFIG_CMD_FLASH is not set
> +# CONFIG_CMD_FPGA is not set
> +# CONFIG_SPL_DOS_PARTITION is not set
> +# CONFIG_SPL_ISO_PARTITION is not set
> +# CONFIG_SPL_EFI_PARTITION is not set
> +CONFIG_SUN8I_EMAC=y
> +CONFIG_USB_EHCI_HCD=y
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH 0/5] sun50i: a64/h5: Add orangepi boards
2017-05-25 19:35 [U-Boot] [PATCH 0/5] sun50i: a64/h5: Add orangepi boards Jagan Teki
` (4 preceding siblings ...)
2017-05-25 19:35 ` [U-Boot] [PATCH 5/5] sun50i: h5: Add initial Orangepi Zero Plus 2 support Jagan Teki
@ 2017-06-02 18:00 ` Jagan Teki
5 siblings, 0 replies; 10+ messages in thread
From: Jagan Teki @ 2017-06-02 18:00 UTC (permalink / raw)
To: u-boot
On Fri, May 26, 2017 at 1:05 AM, Jagan Teki <jagannadh.teki@gmail.com> wrote:
> From: Jagan Teki <jagan@openedev.com>
>
> This series add Allwinner Cortex A-53 boards from OrangePI.
> - Orangepi Win/WinPlus
> - Orangepi Prime
> - Orangepi Zero Plus 2
>
> thanks!
> Jagan.
>
> Jagan Teki (5):
> sun50i: a64: Add initial Orangepi Win/WinPlus support
> arm64: dts: sun50i: Add sun50i-h5.dtsi
> arm64: dts: sun50i: h5: orangepi-pc2: Use GPIO flag binding macro
These two
Applied to u-boot-sunxi/master
thanks!
--
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
^ permalink raw reply [flat|nested] 10+ messages in thread