From: tien.fong.chee at intel.com <tien.fong.chee@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v11 1/6] arm: socfpga: Remove unused passing parameter of socfpga_bridges_reset
Date: Mon, 3 Jul 2017 17:07:04 +0800 [thread overview]
Message-ID: <1499072829-5626-3-git-send-email-tien.fong.chee@intel.com> (raw)
In-Reply-To: <1499072829-5626-1-git-send-email-tien.fong.chee@intel.com>
From: Tien Fong Chee <tien.fong.chee@intel.com>
Remove parameter from socfpga_bridges_reset(), and keeping this function
for single purpose which is just triggering reset on bridges.
socfpga_reset_deassert_bridges_handoff() can be called for releasing reset
on any bridges based on the bridge setting defined in fdt.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
---
arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h | 2 +-
arch/arm/mach-socfpga/reset_manager_arria10.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
index 7922db8..b6d7f4f 100644
--- a/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
@@ -17,7 +17,7 @@ int socfpga_reset_deassert_bridges_handoff(void);
void socfpga_reset_assert_fpga_connected_peripherals(void);
void socfpga_reset_deassert_osc1wd0(void);
void socfpga_reset_uart(int assert);
-int socfpga_bridges_reset(int enable);
+int socfpga_bridges_reset(void);
struct socfpga_reset_manager {
u32 stat;
diff --git a/arch/arm/mach-socfpga/reset_manager_arria10.c b/arch/arm/mach-socfpga/reset_manager_arria10.c
index d8c858c..66f1ec2 100644
--- a/arch/arm/mach-socfpga/reset_manager_arria10.c
+++ b/arch/arm/mach-socfpga/reset_manager_arria10.c
@@ -318,13 +318,13 @@ void socfpga_per_reset_all(void)
}
#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET)
-int socfpga_bridges_reset(int enable)
+int socfpga_bridges_reset(void)
{
/* For SoCFPGA-VT, this is NOP. */
return 0;
}
#else
-int socfpga_bridges_reset(int enable)
+int socfpga_bridges_reset(void)
{
int ret;
--
2.2.0
next prev parent reply other threads:[~2017-07-03 9:07 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-03 9:07 [U-Boot] [PATCH v11 0/6] Add Intel Arria 10 SoC FPGA driver tien.fong.chee at intel.com
2017-07-03 9:07 ` tien.fong.chee at intel.com
2017-07-03 9:07 ` tien.fong.chee at intel.com [this message]
2017-07-03 9:07 ` [U-Boot] [PATCH v11 2/6] arm: socfpga: Restructure FPGA driver in the preparation to support A10 tien.fong.chee at intel.com
2017-07-12 10:55 ` Marek Vasut
2017-07-03 9:07 ` [U-Boot] [PATCH v11 3/6] kconfig: Convert FPGA and FPGA_ALTERA configuration to Kconfig tien.fong.chee at intel.com
2017-07-12 10:56 ` Marek Vasut
2017-07-13 1:46 ` Chee, Tien Fong
2017-07-13 6:31 ` Marek Vasut
2017-07-13 8:08 ` Chee, Tien Fong
2017-07-03 9:07 ` [U-Boot] [PATCH v11 4/6] kconfig: Convert FPGA_SOCFPGA " tien.fong.chee at intel.com
2017-07-03 9:07 ` [U-Boot] [PATCH v11 5/6] drivers: Enable FPGA driver build on SPL tien.fong.chee at intel.com
2017-07-12 10:57 ` Marek Vasut
2017-07-13 1:47 ` Chee, Tien Fong
2017-07-03 9:07 ` [U-Boot] [PATCH v11 6/6] arm: socfpga: Add FPGA driver support for Arria 10 tien.fong.chee at intel.com
2017-07-12 11:00 ` Marek Vasut
2017-07-13 1:48 ` Chee, Tien Fong
2017-07-21 5:33 ` Chee, Tien Fong
2017-07-12 5:13 ` [U-Boot] [PATCH v11 0/6] Add Intel Arria 10 SoC FPGA driver Chee, Tien Fong
2017-07-12 11:00 ` Marek Vasut
2017-07-13 1:50 ` Chee, Tien Fong
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