From: tien.fong.chee at intel.com <tien.fong.chee@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v11 4/6] kconfig: Convert FPGA_SOCFPGA configuration to Kconfig
Date: Mon, 3 Jul 2017 17:07:07 +0800 [thread overview]
Message-ID: <1499072829-5626-6-git-send-email-tien.fong.chee@intel.com> (raw)
In-Reply-To: <1499072829-5626-1-git-send-email-tien.fong.chee@intel.com>
From: Tien Fong Chee <tien.fong.chee@intel.com>
This converts the following to Kconfig:
CONFIG_FPGA_SOCFPGA
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
---
configs/socfpga_arria5_defconfig | 1 +
configs/socfpga_cyclone5_defconfig | 1 +
configs/socfpga_de0_nano_soc_defconfig | 1 +
configs/socfpga_de10_nano_defconfig | 1 +
configs/socfpga_de1_soc_defconfig | 1 +
configs/socfpga_is1_defconfig | 1 +
configs/socfpga_mcvevk_defconfig | 1 +
configs/socfpga_sockit_defconfig | 1 +
configs/socfpga_socrates_defconfig | 1 +
configs/socfpga_sr1500_defconfig | 1 +
configs/socfpga_vining_fpga_defconfig | 1 +
drivers/fpga/Kconfig | 8 ++++++++
include/configs/socfpga_common.h | 3 ---
13 files changed, 19 insertions(+), 3 deletions(-)
diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig
index a565384..6f2a06f 100644
--- a/configs/socfpga_arria5_defconfig
+++ b/configs/socfpga_arria5_defconfig
@@ -40,6 +40,7 @@ CONFIG_CMD_UBI=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_MMC=y
+CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_SYS_I2C_DW=y
diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig
index 06fc82c..1047657 100644
--- a/configs/socfpga_cyclone5_defconfig
+++ b/configs/socfpga_cyclone5_defconfig
@@ -40,6 +40,7 @@ CONFIG_CMD_UBI=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_MMC=y
+CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_SYS_I2C_DW=y
diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig
index 0697e2e..72a9e5d 100644
--- a/configs/socfpga_de0_nano_soc_defconfig
+++ b/configs/socfpga_de0_nano_soc_defconfig
@@ -39,6 +39,7 @@ CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_UBI=y
CONFIG_SPL_DM=y
CONFIG_DFU_MMC=y
+CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_SYS_I2C_DW=y
diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig
index cd64fb9..67864cf 100644
--- a/configs/socfpga_de10_nano_defconfig
+++ b/configs/socfpga_de10_nano_defconfig
@@ -37,6 +37,7 @@ CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPL_DM=y
CONFIG_DFU_MMC=y
+CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_SYS_I2C_DW=y
diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig
index bba90be..35c4484 100644
--- a/configs/socfpga_de1_soc_defconfig
+++ b/configs/socfpga_de1_soc_defconfig
@@ -38,6 +38,7 @@ CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPL_DM=y
+CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_SYS_I2C_DW=y
diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig
index 058791e..ae688f8 100644
--- a/configs/socfpga_is1_defconfig
+++ b/configs/socfpga_is1_defconfig
@@ -34,6 +34,7 @@ CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_UBI=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_SYS_I2C_DW=y
diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig
index 627b90f..c5e3b7b 100644
--- a/configs/socfpga_mcvevk_defconfig
+++ b/configs/socfpga_mcvevk_defconfig
@@ -38,6 +38,7 @@ CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_UBI=y
CONFIG_SPL_DM=y
CONFIG_DFU_MMC=y
+CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_SYS_I2C_DW=y
diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig
index bf5d63d..3ff7bb7 100644
--- a/configs/socfpga_sockit_defconfig
+++ b/configs/socfpga_sockit_defconfig
@@ -40,6 +40,7 @@ CONFIG_CMD_UBI=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_MMC=y
+CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_SYS_I2C_DW=y
diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig
index 5915faf..fb9c13f 100644
--- a/configs/socfpga_socrates_defconfig
+++ b/configs/socfpga_socrates_defconfig
@@ -41,6 +41,7 @@ CONFIG_CMD_UBI=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_MMC=y
+CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_SYS_I2C_DW=y
diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig
index 4468d3b..d90d6a1 100644
--- a/configs/socfpga_sr1500_defconfig
+++ b/configs/socfpga_sr1500_defconfig
@@ -40,6 +40,7 @@ CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_UBI=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_SYS_I2C_DW=y
diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig
index fb9bae4..c3fbe40 100644
--- a/configs/socfpga_vining_fpga_defconfig
+++ b/configs/socfpga_vining_fpga_defconfig
@@ -44,6 +44,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
+CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_LED_STATUS=y
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index a760944..6b2c866 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -13,6 +13,14 @@ config FPGA_ALTERA
Enable Altera FPGA specific functions which includes bitstream
(in BIT format), fpga and device validation.
+config FPGA_SOCFPGA
+ bool "Enable Gen5 and Arria10 common FPGA drivers"
+ select FPGA_ALTERA
+ help
+ Say Y here to enable the Gen5 and Arria10 common FPGA driver
+
+ This provides common functionality for Gen5 and Arria10 devices.
+
config FPGA_CYCLON2
bool "Enable Altera FPGA driver for Cyclone II"
depends on FPGA_ALTERA
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index da7e4ad..1b79c03 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -107,9 +107,6 @@
*/
#ifdef CONFIG_TARGET_SOCFPGA_GEN5
#ifdef CONFIG_CMD_FPGA
-#define CONFIG_FPGA
-#define CONFIG_FPGA_ALTERA
-#define CONFIG_FPGA_SOCFPGA
#define CONFIG_FPGA_COUNT 1
#endif
#endif
--
2.2.0
next prev parent reply other threads:[~2017-07-03 9:07 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-03 9:07 [U-Boot] [PATCH v11 0/6] Add Intel Arria 10 SoC FPGA driver tien.fong.chee at intel.com
2017-07-03 9:07 ` tien.fong.chee at intel.com
2017-07-03 9:07 ` [U-Boot] [PATCH v11 1/6] arm: socfpga: Remove unused passing parameter of socfpga_bridges_reset tien.fong.chee at intel.com
2017-07-03 9:07 ` [U-Boot] [PATCH v11 2/6] arm: socfpga: Restructure FPGA driver in the preparation to support A10 tien.fong.chee at intel.com
2017-07-12 10:55 ` Marek Vasut
2017-07-03 9:07 ` [U-Boot] [PATCH v11 3/6] kconfig: Convert FPGA and FPGA_ALTERA configuration to Kconfig tien.fong.chee at intel.com
2017-07-12 10:56 ` Marek Vasut
2017-07-13 1:46 ` Chee, Tien Fong
2017-07-13 6:31 ` Marek Vasut
2017-07-13 8:08 ` Chee, Tien Fong
2017-07-03 9:07 ` tien.fong.chee at intel.com [this message]
2017-07-03 9:07 ` [U-Boot] [PATCH v11 5/6] drivers: Enable FPGA driver build on SPL tien.fong.chee at intel.com
2017-07-12 10:57 ` Marek Vasut
2017-07-13 1:47 ` Chee, Tien Fong
2017-07-03 9:07 ` [U-Boot] [PATCH v11 6/6] arm: socfpga: Add FPGA driver support for Arria 10 tien.fong.chee at intel.com
2017-07-12 11:00 ` Marek Vasut
2017-07-13 1:48 ` Chee, Tien Fong
2017-07-21 5:33 ` Chee, Tien Fong
2017-07-12 5:13 ` [U-Boot] [PATCH v11 0/6] Add Intel Arria 10 SoC FPGA driver Chee, Tien Fong
2017-07-12 11:00 ` Marek Vasut
2017-07-13 1:50 ` Chee, Tien Fong
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