From: Chee, Tien Fong <tien.fong.chee@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 3/5] configs: socfpga: Add config for RBF loading from FAT fs
Date: Mon, 7 Aug 2017 07:18:27 +0000 [thread overview]
Message-ID: <1502090307.2357.3.camel@intel.com> (raw)
In-Reply-To: <fc62a831-8102-6cda-33cb-7d2946571319@denx.de>
On Isn, 2017-07-31 at 12:54 +0200, Marek Vasut wrote:
> On 07/31/2017 12:50 PM, tien.fong.chee at intel.com wrote:
> >
> > From: Tien Fong Chee <tien.fong.chee@intel.com>
> >
> > This config enable the mechanism for loading RBF file from FAT fs
> > into
> > FPGA manager.
> >
> > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
> > ---
> > arch/arm/mach-socfpga/Kconfig | 7 +++++++
> > 1 files changed, 7 insertions(+), 0 deletions(-)
> >
> > diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-
> > socfpga/Kconfig
> > index 45e5379..3fbac20 100644
> > --- a/arch/arm/mach-socfpga/Kconfig
> > +++ b/arch/arm/mach-socfpga/Kconfig
> > @@ -33,6 +33,13 @@ config
> > SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
> > config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE
> > default 0xa2
> >
> > +config RBF_SDMMC_FAT_SUPPORT
> NAK, Xilinx already has some support for loading FPGA from FS, so
> improve on that.
>
I can change to CONFIG_CMD_FPGA_LOADFS.
> >
> > + bool "Support FPGA program with FAT RBF"
> > + default y if SPL_FAT_SUPPORT
> > + help
> > + Enable support for programming FPGA with RAW
> > binary file
> > + (periph rbf + core rbf) loading from FAT
> > partition.
> > +
> > config TARGET_SOCFPGA_ARRIA5
> > bool
> > select TARGET_SOCFPGA_GEN5
> >
>
next prev parent reply other threads:[~2017-08-07 7:18 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-31 10:50 [U-Boot] [PATCH 0/5] Add intermediate driver(cff driver) between flash & FPGA tien.fong.chee at intel.com
2017-07-31 10:50 ` [U-Boot] [PATCH 1/5] arm: socfpga: Add checking function on searching boot device tien.fong.chee at intel.com
2017-07-31 10:53 ` Marek Vasut
2017-08-02 10:21 ` Chee, Tien Fong
2017-08-02 21:32 ` Marek Vasut
2017-08-04 5:37 ` Chee, Tien Fong
2017-08-04 13:10 ` Marek Vasut
2017-08-07 3:52 ` Chee, Tien Fong
2017-07-31 10:50 ` [U-Boot] [PATCH 2/5] arm: socfpga: Add checking function on FPGA setting in FDT tien.fong.chee at intel.com
2017-07-31 10:50 ` [U-Boot] [PATCH 3/5] configs: socfpga: Add config for RBF loading from FAT fs tien.fong.chee at intel.com
2017-07-31 10:54 ` Marek Vasut
2017-08-02 10:23 ` Chee, Tien Fong
2017-08-07 7:18 ` Chee, Tien Fong [this message]
2017-08-07 7:21 ` Marek Vasut
2017-07-31 10:50 ` [U-Boot] [PATCH 4/5] arm: socfpga: Add intermediate driver between flash and FPGA manager tien.fong.chee at intel.com
2017-07-31 10:55 ` Marek Vasut
2017-08-07 8:16 ` Chee, Tien Fong
2017-08-07 8:19 ` Marek Vasut
2017-08-07 8:43 ` Chee, Tien Fong
2017-07-31 10:50 ` [U-Boot] [PATCH 5/5] arm: socfpga: Enable cff driver build tien.fong.chee at intel.com
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1502090307.2357.3.camel@intel.com \
--to=tien.fong.chee@intel.com \
--cc=u-boot@lists.denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox