From mboxrd@z Thu Jan  1 00:00:00 1970
From: Chee, Tien Fong <tien.fong.chee@intel.com>
Date: Thu, 10 Aug 2017 04:51:39 +0000
Subject: [U-Boot] [PATCH v2 2/5] arm: socfpga: Add checking function on
 FPGA setting in FDT
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 <a4187cf5-f8a6-f594-77cf-3acdc056b6fa@denx.de>
 <1502255220.2162.16.camel@intel.com>
 <a20aec95-8a4f-a084-1200-8e53c1a1d319@denx.de>
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On Rab, 2017-08-09 at 10:20 +0200, Marek Vasut wrote:
> On 08/09/2017 07:07 AM, Chee, Tien Fong wrote:
> > 
> > On Sel, 2017-08-08 at 11:29 +0200, Marek Vasut wrote:
> > > 
> > > On 08/08/2017 11:12 AM, tien.fong.chee at intel.com wrote:
> > > > 
> > > > 
> > > > From: Tien Fong Chee <tien.fong.chee@intel.com>
> > > > 
> > > > Function for checking FPGA early release setting which is
> > > > defined
> > > > by user in FDT chosen section. This function would be used by
> > > > later driver in decision applying appropriate FPGA
> > > > configuration in
> > > > early release or full FPGA booting mode.
> > > Isn't this a property of the FPGA driver ?
This is not property of fpga driver. It acts like passing data flag to
u-boot, so u-boot knows how to boot in the mode defined by user.
> > > Shouldn't this have altr, prefix ?
This node doesn't represet a real device, it acts like a place for
passing data to U-boot. So, this flag name doesn't matter with prefix,
right?
> > > Did this go through DT binding review?
No, refer my explanation above.
> > > 
> > This is our own define under chosen section. This is flag to tell
> > U-
> > boot what kind of boot and what kind of fpga configuration we want
> > during boot.
> And you didn't answer any of the aforementioned questions :(
> 
Sorry, it could be i misunderstand your question. please refer my
asnwer in above.
> > 
> > > 
> > > > 
> > > > 
> > > > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
> > > > ---
> > > >  arch/arm/mach-socfpga/include/mach/misc.h |  1 +
> > > >  arch/arm/mach-socfpga/misc_arria10.c      | 20
> > > > ++++++++++++++++++++
> > > >  2 files changed, 21 insertions(+)
> > > > 
> > > > diff --git a/arch/arm/mach-socfpga/include/mach/misc.h
> > > > b/arch/arm/mach-socfpga/include/mach/misc.h
> > > > index 0b65783..e003f8a 100644
> > > > --- a/arch/arm/mach-socfpga/include/mach/misc.h
> > > > +++ b/arch/arm/mach-socfpga/include/mach/misc.h
> > > > @@ -26,6 +26,7 @@ static inline void socfpga_fpga_add(void) {}
> > > >  unsigned int dedicated_uart_com_port(const void *blob);
> > > >  unsigned int shared_uart_com_port(const void *blob);
> > > >  unsigned int uart_com_port(const void *blob);
> > > > +int is_early_release_fpga_config(const void *blob);
> > > >  #endif
> > > >  
> > > >  #endif /* _MISC_H_ */
> > > > diff --git a/arch/arm/mach-socfpga/misc_arria10.c
> > > > b/arch/arm/mach-
> > > > socfpga/misc_arria10.c
> > > > index 9d751f6..2d6e977 100644
> > > > --- a/arch/arm/mach-socfpga/misc_arria10.c
> > > > +++ b/arch/arm/mach-socfpga/misc_arria10.c
> > > > @@ -235,6 +235,26 @@ unsigned int uart_com_port(const void
> > > > *blob)
> > > >  	return shared_uart_com_port(blob);
> > > >  }
> > > >  
> > > > +int is_chosen_boolean_true(const void *blob, const char *name)
> > > > +{
> > > > +	int node;
> > > > +	int rval = 0;
> > > > +
> > > > +	node = fdt_subnode_offset(blob, 0, "chosen");
> > > > +
> > > > +	if (node >= 0)
> > > > +		rval = fdtdec_get_bool(blob, node, name);
> > > > +
> > > > +	return rval;
> > > > +}
> > > > +
> > > > +int is_early_release_fpga_config(const void *blob)
> > > > +{
> > > > +	static const char *name = "early-release-fpga-config";
> > > > +
> > > > +	return is_chosen_boolean_true(blob, name);
> > > > +}
> > > > +
> > > >  /*
> > > >   * Print CPU information
> > > >   */
> > > > 
>