From: Chee, Tien Fong <tien.fong.chee@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2 2/5] arm: socfpga: Add checking function on FPGA setting in FDT
Date: Sat, 12 Aug 2017 08:05:59 +0000 [thread overview]
Message-ID: <1502525152.2423.33.camel@intel.com> (raw)
In-Reply-To: <55063ecd-25b0-80eb-c9c9-2d433b96828b@denx.de>
On Jum, 2017-08-11 at 17:01 +0200, Marek Vasut wrote:
> On 08/10/2017 06:51 AM, Chee, Tien Fong wrote:
> >
> > On Rab, 2017-08-09 at 10:20 +0200, Marek Vasut wrote:
> > >
> > > On 08/09/2017 07:07 AM, Chee, Tien Fong wrote:
> > > >
> > > >
> > > > On Sel, 2017-08-08 at 11:29 +0200, Marek Vasut wrote:
> > > > >
> > > > >
> > > > > On 08/08/2017 11:12 AM, tien.fong.chee at intel.com wrote:
> > > > > >
> > > > > >
> > > > > >
> > > > > > From: Tien Fong Chee <tien.fong.chee@intel.com>
> > > > > >
> > > > > > Function for checking FPGA early release setting which is
> > > > > > defined
> > > > > > by user in FDT chosen section. This function would be used
> > > > > > by
> > > > > > later driver in decision applying appropriate FPGA
> > > > > > configuration in
> > > > > > early release or full FPGA booting mode.
> > > > > Isn't this a property of the FPGA driver ?
> > This is not property of fpga driver. It acts like passing data flag
> > to
> > u-boot, so u-boot knows how to boot in the mode defined by user.
> So it's a configuration option ? Doing what ... since there's no
> binding
> document, it's not clear.
>
Okay, i can add decription into / doc / device-tree-bindings /
chosen.txt.
> >
> > >
> > > >
> > > > >
> > > > > Shouldn't this have altr, prefix ?
> > This node doesn't represet a real device, it acts like a place for
> > passing data to U-boot. So, this flag name doesn't matter with
> > prefix,
> > right?
> But it's altera-specific, so it should have one ?
>
Yeah, i can add it.
> >
> > >
> > > >
> > > > >
> > > > > Did this go through DT binding review?
> > No, refer my explanation above.
> > >
> > > >
> > > > >
> > > > >
> > > > This is our own define under chosen section. This is flag to
> > > > tell
> > > > U-
> > > > boot what kind of boot and what kind of fpga configuration we
> > > > want
> > > > during boot.
> > > And you didn't answer any of the aforementioned questions :(
> > >
> > Sorry, it could be i misunderstand your question. please refer my
> > asnwer in above.
> > >
> > > >
> > > >
> > > > >
> > > > >
> > > > > >
> > > > > >
> > > > > >
> > > > > > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
> > > > > > ---
> > > > > > arch/arm/mach-socfpga/include/mach/misc.h | 1 +
> > > > > > arch/arm/mach-socfpga/misc_arria10.c | 20
> > > > > > ++++++++++++++++++++
> > > > > > 2 files changed, 21 insertions(+)
> > > > > >
> > > > > > diff --git a/arch/arm/mach-socfpga/include/mach/misc.h
> > > > > > b/arch/arm/mach-socfpga/include/mach/misc.h
> > > > > > index 0b65783..e003f8a 100644
> > > > > > --- a/arch/arm/mach-socfpga/include/mach/misc.h
> > > > > > +++ b/arch/arm/mach-socfpga/include/mach/misc.h
> > > > > > @@ -26,6 +26,7 @@ static inline void socfpga_fpga_add(void)
> > > > > > {}
> > > > > > unsigned int dedicated_uart_com_port(const void *blob);
> > > > > > unsigned int shared_uart_com_port(const void *blob);
> > > > > > unsigned int uart_com_port(const void *blob);
> > > > > > +int is_early_release_fpga_config(const void *blob);
> > > > > > #endif
> > > > > >
> > > > > > #endif /* _MISC_H_ */
> > > > > > diff --git a/arch/arm/mach-socfpga/misc_arria10.c
> > > > > > b/arch/arm/mach-
> > > > > > socfpga/misc_arria10.c
> > > > > > index 9d751f6..2d6e977 100644
> > > > > > --- a/arch/arm/mach-socfpga/misc_arria10.c
> > > > > > +++ b/arch/arm/mach-socfpga/misc_arria10.c
> > > > > > @@ -235,6 +235,26 @@ unsigned int uart_com_port(const void
> > > > > > *blob)
> > > > > > return shared_uart_com_port(blob);
> > > > > > }
> > > > > >
> > > > > > +int is_chosen_boolean_true(const void *blob, const char
> > > > > > *name)
> > > > > > +{
> > > > > > + int node;
> > > > > > + int rval = 0;
> > > > > > +
> > > > > > + node = fdt_subnode_offset(blob, 0, "chosen");
> > > > > > +
> > > > > > + if (node >= 0)
> > > > > > + rval = fdtdec_get_bool(blob, node, name);
> > > > > > +
> > > > > > + return rval;
> > > > > > +}
> > > > > > +
> > > > > > +int is_early_release_fpga_config(const void *blob)
> > > > > > +{
> > > > > > + static const char *name = "early-release-fpga-
> > > > > > config";
> > > > > > +
> > > > > > + return is_chosen_boolean_true(blob, name);
> > > > > > +}
> > > > > > +
> > > > > > /*
> > > > > > * Print CPU information
> > > > > > */
> > > > > >
>
next prev parent reply other threads:[~2017-08-12 8:05 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-08 9:12 [U-Boot] [PATCH v2 0/5] Add flash to fpga intermediate driver tien.fong.chee at intel.com
2017-08-08 9:12 ` [U-Boot] [PATCH v2 1/5] arm: socfpga: Make spl_boot_device accessible to U-boot tien.fong.chee at intel.com
2017-08-08 9:12 ` [U-Boot] [PATCH v2 2/5] arm: socfpga: Add checking function on FPGA setting in FDT tien.fong.chee at intel.com
2017-08-08 9:29 ` Marek Vasut
2017-08-09 5:07 ` Chee, Tien Fong
2017-08-09 8:20 ` Marek Vasut
2017-08-10 4:51 ` Chee, Tien Fong
2017-08-11 15:01 ` Marek Vasut
2017-08-12 8:05 ` Chee, Tien Fong [this message]
2017-08-12 16:43 ` Marek Vasut
2017-08-08 9:12 ` [U-Boot] [PATCH v2 3/5] configs: Add FPGA loadfs config for Arria 10 tien.fong.chee at intel.com
2017-08-08 9:12 ` [U-Boot] [PATCH v2 4/5] arm: socfpga: Add intermediate driver between flash and FPGA manager tien.fong.chee at intel.com
2017-08-08 9:32 ` Marek Vasut
2017-08-08 10:06 ` Chee, Tien Fong
2017-08-08 10:11 ` Marek Vasut
2017-08-09 4:50 ` Chee, Tien Fong
2017-08-09 8:29 ` Marek Vasut
2017-08-10 4:43 ` Chee, Tien Fong
2017-08-11 15:09 ` Marek Vasut
2017-08-12 8:03 ` Chee, Tien Fong
2017-08-12 16:49 ` Marek Vasut
2017-08-14 3:58 ` Chee, Tien Fong
2017-08-15 9:47 ` Marek Vasut
2017-08-08 9:12 ` [U-Boot] [PATCH v2 5/5] arm: socfpga: Enable cff driver build tien.fong.chee at intel.com
2017-08-08 9:32 ` Marek Vasut
2017-08-09 4:28 ` Chee, Tien Fong
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