[U-Boot] [PATCH 19/19] arm: socfpga: Enable SPL loading U-boot to DDR and booting U-boot

tien.fong.chee at intel.com
2017-08-29T10:46:01Z

From: Tien Fong Chee <tien.fong.chee@intel.com>

Enable SPL loading U-boot from SDMMC to DDR and booting U-boot.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
---
arch/arm/mach-socfpga/spl.c | 87 +++++++++++++++++++++++++++++++++++++
common/spl/spl_mmc.c | 2 +-
configs/socfpga_arria10_defconfig | 49 ++++++++++++++++++++-
disk/part.c | 2 +
include/spl.h | 2 +
5 files changed, 139 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-socfpga/spl.c b/arch/arm/mach-socfpga/spl.c
index aba116d..555a848 100644
--- a/arch/arm/mach-socfpga/spl.c
+++ b/arch/arm/mach-socfpga/spl.c
@@ -15,6 +15,7 @@
#include <asm/arch/system_manager.h>
#include <asm/arch/freeze_controller.h>
#include <asm/arch/clock_manager.h>
+#include <asm/arch/fpga_manager.h>
#include <asm/arch/misc.h>
#include <asm/arch/scan_manager.h>
#include <asm/arch/sdram.h>
@@ -22,6 +23,10 @@
#include <asm/arch/nic301.h>
#include <asm/sections.h>
#include <fdtdec.h>
+#include <fat.h>
+#include <fs.h>
+#include <linux/ctype.h>
+#include <mmc.h>
#include <watchdog.h>
#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
#include <asm/arch/pinmux.h>
@@ -29,6 +34,9 @@

DECLARE_GLOBAL_DATA_PTR;

+#define BSIZE 4096
+#define PERIPH_RBF 0
+
#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
static struct pl310_regs *const pl310 =
(struct pl310_regs *)CONFIG_SYS_PL310_BASE;
@@ -197,6 +205,11 @@ void board_init_f(ulong dummy)
#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
void spl_board_init(void)
{
+ int rval = 0;
+ int len = 0;
+ u32 buffer[BSIZE] __aligned(ARCH_DMA_MINALIGN);
+ struct spl_boot_device bootdev;
+
/* configuring the clock based on handoff */
cm_basic_init(gd->fdt_blob);
WATCHDOG_RESET();
@@ -214,6 +227,80 @@ void spl_board_init(void)

/* Add device descriptor to FPGA device table */
socfpga_fpga_add();
+
+ bootdev.boot_device = spl_boot_device();
+
+ if(BOOT_DEVICE_MMC1 == bootdev.boot_device)
+ {
+ struct mmc *mmc = NULL;
+ int err = 0;
+ fpga_fs_info fpga_fsinfo;
+ const char *part_str;
+ char *dup_str = NULL;
+
+ spl_mmc_find_device(&mmc, bootdev.boot_device);
+
+ err = mmc_init(mmc);
+
+ if (err) {
+#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
+ printf("spl: mmc init failed with error: %d\n", err);
+#endif
+ }
+
+ fpga_fsinfo.filename = (char *) get_cff_filename(gd->fdt_blob,
+ &len,
+ PERIPH_RBF);
+
+ fpga_fsinfo.dev_part = (char *) get_cff_devpart(gd->fdt_blob,
+ &len);
+
+ fpga_fsinfo.interface = "mmc";
+
+ fpga_fsinfo.fstype = FS_TYPE_FAT;
+
+ /* Program peripheral RBF */
+ if (fpga_fsinfo.filename && (len > 0)) {
+
+ if (NULL == fpga_fsinfo.dev_part) {
+ /* FAT partition */
+ fpga_fsinfo.dev_part = "0:1";
+
+ printf("No SD/MMC partition found in ");
+ printf("environment. Assuming device 0,");
+ printf(" partition 1.\n");
+ }
+
+ /* Separate device and partition ID specification */
+ part_str = strchr(fpga_fsinfo.dev_part, ':');
+ dup_str = strdup(fpga_fsinfo.dev_part);
+ dup_str[part_str - fpga_fsinfo.dev_part] = 0;
+ part_str++;
+
+ if(!isdigit(*part_str))
+ {
+ printf("Invalid device partition |%c|\n",
+ *part_str );
+ return;
+ }
+
+ /* we are looking at the FAT partition */
+ if (fat_register_device(mmc_get_blk_desc(mmc),
+ simple_strtol(part_str, NULL, 10))) {
+ printf("Failed to set partition |%c| to FAT.\n",
+ *part_str);
+ return;
+ }
+
+ rval = fpga_fsload(0, buffer, BSIZE, &fpga_fsinfo);
+ }
+ }
+
+ if (rval > 0) {
+ config_pins(gd->fdt_blob, "shared");
+
+ ddr_calibration_sequence();
+ }
}

void board_init_f(ulong dummy)
diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index bb48cac..be47fea 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -113,7 +113,7 @@ static int spl_mmc_get_device_index(u32 boot_device)
return -ENODEV;
}

-static int spl_mmc_find_device(struct mmc **mmcp, u32 boot_device)
+int spl_mmc_find_device(struct mmc **mmcp, u32 boot_device)
{
#ifdef CONFIG_DM_MMC
struct udevice *dev;
diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig
index 4238710..dabed39 100644
--- a/configs/socfpga_arria10_defconfig
+++ b/configs/socfpga_arria10_defconfig
@@ -2,32 +2,77 @@ CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y
+CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_IDENT_STRING="socfpga_arria10"
CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk_sdmmc"
CONFIG_DEFAULT_FDT_FILE="socfpga_arria10_socdk_sdmmc.dtb"
+CONFIG_FIT=y
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
+CONFIG_HUSH_PARSER=y
CONFIG_SPL_FPGA_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_FS_FAT_MAX_CLUSTSIZE=32768
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_CMD_PART=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_SYS_I2C_DW=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MII=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_DOS_PARTITION=y
-# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_DOS_PARTITION=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_DFU_MMC=y
CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_DM_MMC=y
+CONFIG_MMC_DW=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
-CONFIG_USE_TINY_PRINTF=y
CONFIG_CMD_FPGA_LOADFS=y
+CONFIG_CADENCE_QSPI=y
+CONFIG_DESIGNWARE_SPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="altera"
+CONFIG_G_DNL_VENDOR_NUM=0x0525
+CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800
+CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
diff --git a/disk/part.c b/disk/part.c
index 491b02d..fc5ebc3 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -427,6 +427,7 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str,
}
#endif

+#ifndef CONFIG_SPL_BUILD
#ifdef CONFIG_CMD_UBIFS
/*
* Special-case ubi, ubi goes through a mtd, rathen then through
@@ -448,6 +449,7 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str,
return 0;
}
#endif
+#endif

/* If no dev_part_str, use bootdevice environment variable */
if (!dev_part_str || !strlen(dev_part_str) ||
diff --git a/include/spl.h b/include/spl.h
index ffadce9..2c9c171 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -10,6 +10,7 @@
/* Platform-specific defines */
#include <linux/compiler.h>
#include <asm/spl.h>
+#include <mmc.h>

/* Value in r0 indicates we booted from U-Boot */
#define UBOOT_NOT_LOADED_FROM_SPL 0x13578642
@@ -68,6 +69,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
void preloader_console_init(void);
u32 spl_boot_device(void);
u32 spl_boot_mode(const u32 boot_device);
+int spl_mmc_find_device(struct mmc **mmcp, u32 boot_device);

/**
* spl_set_header_raw_uboot() - Set up a standard SPL image structure
--
1.7.7.4