[U-Boot] [PATCH v2 11/19] arm: socfpga: Add DRAM bank size initialization function

Chee, Tien Fong
2017-09-26T08:20:54Z

On Isn, 2017-09-25 at 11:15 +0200, Marek Vasut wrote:
> On 09/25/2017 10:40 AM, tien.fong.chee at intel.com wrote:
> >
> > From: Tien Fong Chee <tien.fong.chee@intel.com>
> >
> > Add function for both multiple DRAM bank and single DRAM bank size
> > initialization. This common functionality could be used by every
> > single
> > SOCFPGA board.
> >
> > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
> I'd like TB on Gen5.
>
What is TB?
> >
> > ---
> >  arch/arm/mach-socfpga/board.c    | 7 +++++++
> >  include/configs/socfpga_common.h | 1 +
> >  2 files changed, 8 insertions(+)
> >
> > diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-
> > socfpga/board.c
> > index a41d089..965f9dc 100644
> > --- a/arch/arm/mach-socfpga/board.c
> > +++ b/arch/arm/mach-socfpga/board.c
> > @@ -29,6 +29,13 @@ int board_init(void)
> >   return 0;
> >  }
> >
> > +int dram_init_banksize(void)
> > +{
> > + fdtdec_setup_memory_banksize();
> > +
> > + return 0;
> > +}
> > +
> >  #ifdef CONFIG_USB_GADGET
> >  struct dwc2_plat_otg_data socfpga_otg_data = {
> >   .usb_gusbcfg = 0x1417,
> > diff --git a/include/configs/socfpga_common.h
> > b/include/configs/socfpga_common.h
> > index eadce2d..7549ee8 100644
> > --- a/include/configs/socfpga_common.h
> > +++ b/include/configs/socfpga_common.h
> > @@ -47,6 +47,7 @@
> >   (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
> >
> >  #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
> > +#define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_1_SIZE
> >  #ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
> >  #define CONFIG_SYS_TEXT_BASE 0x08000040
> >  #else
> >
>