[U-Boot] [PATCH v2 18/19] arm: socfpga: Adding SoCFPGA info for both SPL and U-boot

tien.fong.chee at intel.com
2017-09-25T08:40:14Z

From: Tien Fong Chee <tien.fong.chee@intel.com>

SoC FPGA info is required in both SPL and U-boot.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
---
arch/arm/mach-socfpga/board.c | 3 +++
arch/arm/mach-socfpga/misc_arria10.c | 5 -----
arch/arm/mach-socfpga/spl.c | 6 ++++++
3 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-socfpga/board.c
index a00f63b..0fbad67 100644
--- a/arch/arm/mach-socfpga/board.c
+++ b/arch/arm/mach-socfpga/board.c
@@ -32,6 +32,9 @@ int board_init(void)
/* configuring the clock based on handoff */
cm_basic_init(gd->fdt_blob);

+ /* Add device descriptor to FPGA device table */
+ socfpga_fpga_add();
+
return 0;
}

diff --git a/arch/arm/mach-socfpga/misc_arria10.c b/arch/arm/mach-socfpga/misc_arria10.c
index 9d751f6..8760ac9 100644
--- a/arch/arm/mach-socfpga/misc_arria10.c
+++ b/arch/arm/mach-socfpga/misc_arria10.c
@@ -94,11 +94,6 @@ int arch_early_init_r(void)
/* assert reset to all except L4WD0 and L4TIMER0 */
socfpga_per_reset_all();

- /* configuring the clock based on handoff */
- /* TODO: Add call to cm_basic_init() */
-
- /* Add device descriptor to FPGA device table */
- socfpga_fpga_add();
return 0;
}
#else
diff --git a/arch/arm/mach-socfpga/spl.c b/arch/arm/mach-socfpga/spl.c
index 71bae82..aba116d 100644
--- a/arch/arm/mach-socfpga/spl.c
+++ b/arch/arm/mach-socfpga/spl.c
@@ -15,6 +15,7 @@
#include <asm/arch/system_manager.h>
#include <asm/arch/freeze_controller.h>
#include <asm/arch/clock_manager.h>
+#include <asm/arch/misc.h>
#include <asm/arch/scan_manager.h>
#include <asm/arch/sdram.h>
#include <asm/arch/scu.h>
@@ -208,6 +209,11 @@ void spl_board_init(void)

/* enable console uart printing */
preloader_console_init();
+
+ WATCHDOG_RESET();
+
+ /* Add device descriptor to FPGA device table */
+ socfpga_fpga_add();
}

void board_init_f(ulong dummy)
--
2.2.0