[U-Boot] [PATCH v2 03/19] dts: Add FPGA bitstream properties to Arria 10 DTS

tien.fong.chee at intel.com
2017-09-25T08:39:59Z

From: Tien Fong Chee <tien.fong.chee@intel.com>

These FPGA bitstream properties would help bootloader to understand
how to configure FPGA and where to look the FPGA RBF files during
booting.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
---
arch/arm/dts/socfpga_arria10.dtsi | 3 +++
1 file changed, 3 insertions(+)

diff --git a/arch/arm/dts/socfpga_arria10.dtsi b/arch/arm/dts/socfpga_arria10.dtsi
index 377700d..d4368ce 100644
--- a/arch/arm/dts/socfpga_arria10.dtsi
+++ b/arch/arm/dts/socfpga_arria10.dtsi
@@ -538,6 +538,9 @@
clocks = <&l4_mp_clk>;
resets = <&rst FPGAMGR_RESET>;
reset-names = "fpgamgr";
+ bitstream_periph = "ghrd_10as066n2.periph.rbf.mkimage";
+ bitstream_core = "ghrd_10as066n2.core.rbf.mkimage";
+ bitstream_devpart = "0:1";
};

i2c0: i2c at ffc02200 {
--
2.2.0