[U-Boot] [PATCH v2 19/19] arm: socfpga: Enable SPL loading U-boot to DDR and booting U-boot

Chee, Tien Fong
2017-09-26T04:31:48Z

On Isn, 2017-09-25 at 11:24 +0200, Marek Vasut wrote:
> On 09/25/2017 10:40 AM, tien.fong.chee at intel.com wrote:
> >
> > From: Tien Fong Chee <tien.fong.chee@intel.com>
> >
> > Enable SPL loading U-boot from SDMMC to DDR and booting U-boot.
> This patch seems to be doing more than just one thing ...
>
I can split into two patches:
1) Enable DDR up by configuring FPGA so SPL able loading U-boot to DDR
2) Setting up configs so SPL can boot U-boot from FAT.
> >
> > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
> > ---
> >  arch/arm/mach-socfpga/spl.c       | 55
> > +++++++++++++++++++++++++++++++++++++
> >  common/spl/spl_mmc.c              |  2 +-
> >  configs/socfpga_arria10_defconfig | 57
> > ++++++++++++++++++++++++++++++++++-----
> >  include/spl.h                     |  2 ++
> >  4 files changed, 108 insertions(+), 8 deletions(-)
> >
> > diff --git a/arch/arm/mach-socfpga/spl.c b/arch/arm/mach-
> > socfpga/spl.c
> > index aba116d..9b381bb 100644
> > --- a/arch/arm/mach-socfpga/spl.c
> > +++ b/arch/arm/mach-socfpga/spl.c
> > @@ -15,6 +15,7 @@
> >  #include <asm/arch/system_manager.h>
> >  #include <asm/arch/freeze_controller.h>
> >  #include <asm/arch/clock_manager.h>
> > +#include <asm/arch/fpga_manager.h>
> >  #include <asm/arch/misc.h>
> >  #include <asm/arch/scan_manager.h>
> >  #include <asm/arch/sdram.h>
> > @@ -22,6 +23,10 @@
> >  #include <asm/arch/nic301.h>
> >  #include <asm/sections.h>
> >  #include <fdtdec.h>
> > +#include <fat.h>
> > +#include <fs.h>
> > +#include <linux/ctype.h>
> > +#include <mmc.h>
> >  #include <watchdog.h>
> >  #if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> >  #include <asm/arch/pinmux.h>
> > @@ -29,6 +34,9 @@
> >
> >  DECLARE_GLOBAL_DATA_PTR;
> >
> > +#define BSIZE 4096
> > +#define PERIPH_RBF 0
> > +
> >  #if defined(CONFIG_TARGET_SOCFPGA_GEN5)
> >  static struct pl310_regs *const pl310 =
> >   (struct pl310_regs *)CONFIG_SYS_PL310_BASE;
> > @@ -197,6 +205,12 @@ void board_init_f(ulong dummy)
> >  #elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> >  void spl_board_init(void)
> >  {
> > + int rval = 0;
> > + int len = 0;
> > + u32 buffer[BSIZE] __aligned(ARCH_DMA_MINALIGN);
> > + struct spl_boot_device bootdev;
> > + fpga_fs_info fpga_fsinfo;
> > +
> >   /* configuring the clock based on handoff */
> >   cm_basic_init(gd->fdt_blob);
> >   WATCHDOG_RESET();
> > @@ -214,6 +228,47 @@ void spl_board_init(void)
> >
> >   /* Add device descriptor to FPGA device table */
> >   socfpga_fpga_add();
> > +
> > + bootdev.boot_device = spl_boot_device();
> > +
> > + if (BOOT_DEVICE_MMC1 == bootdev.boot_device) {
> > + struct mmc *mmc = NULL;
> > + int err = 0;
> > +
> > + spl_mmc_find_device(&mmc, bootdev.boot_device);
> > +
> > + err = mmc_init(mmc);
> > +
> > + if (err) {
> > +#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
> > + printf("spl: mmc init failed with error:
> > %d\n", err);
> > +#endif
> > + }
> > +
> > + fpga_fsinfo.dev_part = (char *)get_cff_devpart(gd-
> > >fdt_blob,
> > +  &
> > len);
> > +
> > + fpga_fsinfo.filename = (char
> > *)get_cff_filename(gd->fdt_blob,
> > +  &
> > len,
> > + PE
> > RIPH_RBF);
> > +
> > + fpga_fsinfo.interface = "mmc";
> > +
> > + fpga_fsinfo.fstype = FS_TYPE_FAT;
> > + } else {
> > + printf("Invalid boot device!\n");
> > + return;
> > + }
> > +
> > + /* Program peripheral RBF */
> > + if (fpga_fsinfo.filename && fpga_fsinfo.dev_part && (len >
> > 0))
> > + rval = fpga_fsload(0, buffer, BSIZE,
> > &fpga_fsinfo);
> > +
> > + if (rval > 0) {
> > + config_pins(gd->fdt_blob, "shared");
> > +
> > + ddr_calibration_sequence();
> > + }
> >  }
> >
> >  void board_init_f(ulong dummy)
> > diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
> > index b2cccc6..159443f 100644
> > --- a/common/spl/spl_mmc.c
> > +++ b/common/spl/spl_mmc.c
> > @@ -113,7 +113,7 @@ static int spl_mmc_get_device_index(u32
> > boot_device)
> >   return -ENODEV;
> >  }
> >
> > -static int spl_mmc_find_device(struct mmc **mmcp, u32 boot_device)
> > +int spl_mmc_find_device(struct mmc **mmcp, u32 boot_device)
> >  {
> >  #if CONFIG_IS_ENABLED(DM_MMC)
> >   struct udevice *dev;
> > diff --git a/configs/socfpga_arria10_defconfig
> > b/configs/socfpga_arria10_defconfig
> > index 4c73d73..2ff9801 100644
> > --- a/configs/socfpga_arria10_defconfig
> > +++ b/configs/socfpga_arria10_defconfig
> > @@ -2,33 +2,76 @@ CONFIG_ARM=y
> >  CONFIG_ARCH_SOCFPGA=y
> >  CONFIG_SYS_MALLOC_F_LEN=0x2000
> >  CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y
> > +CONFIG_SPL_STACK_R_ADDR=0x00800000
> >  CONFIG_IDENT_STRING="socfpga_arria10"
> >  CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk_sdmmc"
> > -CONFIG_USE_BOOTARGS=y
> > -CONFIG_BOOTARGS="console=ttyS0,115200"
> >  CONFIG_DEFAULT_FDT_FILE="socfpga_arria10_socdk_sdmmc.dtb"
> > +CONFIG_FIT=y
> > +CONFIG_SYS_CONSOLE_IS_IN_ENV=y
> > +CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
> > +CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
> > +CONFIG_SPL_ENV_SUPPORT=y
> > +CONFIG_VERSION_VARIABLE=y
> >  CONFIG_SPL=y
> > +CONFIG_HUSH_PARSER=y
> >  CONFIG_SPL_FPGA_SUPPORT=y
> > +CONFIG_SPL_FAT_SUPPORT=y
> > +CONFIG_FS_FAT_MAX_CLUSTSIZE=32768
> >  CONFIG_CMD_BOOTZ=y
> >  # CONFIG_CMD_IMLS is not set
> >  CONFIG_CMD_ASKENV=y
> >  CONFIG_CMD_GREPENV=y
> >  # CONFIG_CMD_FLASH is not set
> > -CONFIG_CMD_GPIO=y
> > +CONFIG_SPL_LIBDISK_SUPPORT=y
> > +CONFIG_CMD_PART=y
> >  CONFIG_CMD_MMC=y
> > +CONFIG_CMD_SF=y
> > +CONFIG_CMD_SPI=y
> > +CONFIG_CMD_I2C=y
> > +CONFIG_SYS_I2C_DW=y
> > +CONFIG_CMD_USB=y
> > +CONFIG_CMD_DFU=y
> > +CONFIG_CMD_USB_MASS_STORAGE=y
> > +CONFIG_CMD_GPIO=y
> > +CONFIG_CMD_MII=y
> >  CONFIG_CMD_DHCP=y
> >  CONFIG_CMD_PING=y
> >  CONFIG_CMD_CACHE=y
> > -CONFIG_CMD_EXT4=y
> > -CONFIG_CMD_EXT4_WRITE=y
> >  CONFIG_DOS_PARTITION=y
> > -# CONFIG_SPL_DOS_PARTITION is not set
> > -CONFIG_ENV_IS_IN_MMC=y
> > +CONFIG_SPL_DOS_PARTITION=y
> > +CONFIG_SPL_FS_GENERIC=y
> > +CONFIG_CMD_FAT=y
> > +CONFIG_CMD_FS_GENERIC=y
> >  CONFIG_SPL_DM=y
> >  CONFIG_SPL_DM_SEQ_ALIAS=y
> > +CONFIG_DFU_MMC=y
> >  CONFIG_FPGA_SOCFPGA=y
> >  CONFIG_DM_GPIO=y
> >  CONFIG_DWAPB_GPIO=y
> >  CONFIG_DM_MMC=y
> > +CONFIG_MMC_DW=y
> > +CONFIG_SPI_FLASH=y
> > +CONFIG_SPI_FLASH_BAR=y
> > +CONFIG_SPI_FLASH_SPANSION=y
> > +CONFIG_SPI_FLASH_STMICRO=y
> > +CONFIG_DM_ETH=y
> > +CONFIG_ETH_DESIGNWARE=y
> >  CONFIG_SYS_NS16550=y
> >  CONFIG_USE_TINY_PRINTF=y
> > +CONFIG_CMD_FPGA_LOADFS=y
> > +CONFIG_CADENCE_QSPI=y
> > +CONFIG_DESIGNWARE_SPI=y
> > +CONFIG_USB=y
> > +CONFIG_DM_USB=y
> > +CONFIG_USB_STORAGE=y
> > +CONFIG_USB_GADGET=y
> > +CONFIG_USB_GADGET_DWC2_OTG=y
> > +CONFIG_USB_GADGET_DOWNLOAD=y
> > +CONFIG_G_DNL_MANUFACTURER="altera"
> > +CONFIG_G_DNL_VENDOR_NUM=0x0525
> > +CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
> > +CONFIG_USE_TINY_PRINTF=y
> > +CONFIG_SPL_MMC_SUPPORT=y
> > +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
> > +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800
> > +CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
> > diff --git a/include/spl.h b/include/spl.h
> > index ce4cf0a..e24433d 100644
> > --- a/include/spl.h
> > +++ b/include/spl.h
> > @@ -10,6 +10,7 @@
> >  /* Platform-specific defines */
> >  #include <linux/compiler.h>
> >  #include <asm/spl.h>
> > +#include <mmc.h>
> >
> >  /* Value in r0 indicates we booted from U-Boot */
> >  #define UBOOT_NOT_LOADED_FROM_SPL 0x13578642
> > @@ -68,6 +69,7 @@ int spl_load_simple_fit(struct spl_image_info
> > *spl_image,
> >  void preloader_console_init(void);
> >  u32 spl_boot_device(void);
> >  u32 spl_boot_mode(const u32 boot_device);
> > +int spl_mmc_find_device(struct mmc **mmcp, u32 boot_device);
> >
> >  /**
> >   * spl_set_header_raw_uboot() - Set up a standard SPL image
> > structure
> >
>