[U-Boot] [PATCH v2 09/19] arm: socfpga: Add drivers for programing FPGA from flash

Marek Vasut
2017-09-27T09:23:41Z

On 09/27/2017 11:13 AM, Chee, Tien Fong wrote:
> On Sel, 2017-09-26 at 12:39 +0200, Marek Vasut wrote:
>> On 09/26/2017 11:52 AM, Chee, Tien Fong wrote:
>>>
>>> On Isn, 2017-09-25 at 11:14 +0200, Marek Vasut wrote:
>>>>
>>>> On 09/25/2017 10:40 AM, tien.fong.chee at intel.com wrote:
>>>>>
>>>>>
>>>>> From: Tien Fong Chee <tien.fong.chee@intel.com>
>>>>>
>>>>> These drivers handle FPGA program operation from flash loading
>>>>> RBF to memory and then to program FPGA.
>>>>>
>>>>> Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
>> [...]
>>
>>>
>>>>
>>>>>
>>>>> +const char *get_cff_devpart(const void *fdt, int *len)
>>>>> +{
>>>>> + const char *cff_devpart = NULL;
>>>>> + const char *cell;
>>>>> + int nodeoffset;
>>>>> + nodeoffset = fdtdec_next_compatible(fdt, 0,
>>>>> + Â COMPAT_ALTERA_SOCFPGA_FPGA0);
>>>>> +
>>>>> + cell = fdt_getprop(fdt, nodeoffset,
>>>>> "bitstream_devpart",
>>>>> len);
>>>>> +
>>>>> + if (cell)
>>>>> + cff_devpart = cell;
>>>>> +
>>>>> + return cff_devpart;
>>>>> +}
>>>> Take a look at splash*.c , I believe that can be reworked into
>>>> generic
>>>> firmware loader , which you could then use here.
>>>>
>>> the devpart is hard coded in splash*.c. The function here is
>>> getting
>>> devpart info from DTS. So, is there any similar function in
>>> splash*.c?
>>> May be you can share more about your idea.
>> The generic loader could use some work of course ...
>>
> Sorry, i am still confusing. Allow me to ask you more:
> 1. Is the generic firmware loader already exists in splash*.c?

No

> 2. Are you talking about get_cff_devpart or whole fpga laodfs?
> 3. You want me integrate get_cff_devpart function into splash*.c?
> 4. Are you means to hard code the devpart instead providing dynamic
> devpart described in DTS?

I am talking about factoring out generic firmware loader from splash*c ,
since it already contains most of the parts for such a thing.

> Current implementation are located in spl_board_init func
> (arcg/arm/mach-socfpga/spl.c). Based on boot device such as mmc, nand
> and QSPI, then reading some info from DTS, setting dev and partition
> with generic fs functions, and reading with generic fs function before
> programming RBF into FPGA. All these are in patch 19.

That's what splash*c also does, so adding separate parallel
implementation of the same functionality is a no-no.

> Thanks.
>> [...]

--
Best regards,
Marek Vasut