From: Chee, Tien Fong <tien.fong.chee@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2 16/19] arm: socfpga: Enhance Intel SoCFPGA program header to support Arria 10
Date: Tue, 26 Sep 2017 04:42:10 +0000 [thread overview]
Message-ID: <1506400929.27760.7.camel@intel.com> (raw)
In-Reply-To: <74b5459c-f4c4-7457-d041-1a12833e23a8@denx.de>
On Isn, 2017-09-25 at 11:23 +0200, Marek Vasut wrote:
> On 09/25/2017 10:40 AM, tien.fong.chee at intel.com wrote:
> >
> > From: Tien Fong Chee <tien.fong.chee@intel.com>
> >
> > Enhance preloader header with both additional program length and
> > program
> > entry offset attributes, which offset is relative to the start of
> > program
> > header.
> >
> > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
> > ---
> > arch/arm/mach-socfpga/include/mach/boot0.h | 11 +++++++++--
> > 1 file changed, 9 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h
> > b/arch/arm/mach-socfpga/include/mach/boot0.h
> > index 22d9e7f..33c9368 100644
> > --- a/arch/arm/mach-socfpga/include/mach/boot0.h
> > +++ b/arch/arm/mach-socfpga/include/mach/boot0.h
> > @@ -11,8 +11,15 @@
> > .balignl 64,0xf33db33f;
> >
> > .word 0x1337c0d3; /* SoCFPGA preloader
> > validation word */
> > - .word 0xc01df00d; /* Version, flags, length
> > */
> > - .word 0xcafec0d3; /* Checksum, zero-pad */
> > + .word 0xc01df00d; /* Header
> > length(2B),flags(1B),version(1B) */
> > +#ifndef CONFIG_TARGET_SOCFPGA_GEN5
> > + .word 0xfeedface; /* Program length(4B) */
> Keep this indent intact, then it won't generate these crappy -
> entries.
>
Are you saying to keep the comment indent intact, and allign with 1st
comment /* SoCFPGA preloader validation word */ ?
> >
> > + .word 0xf00dcafe; /*
> > + * Program entry offset(4B),relative
> > to
> > + * the start of program header
> > + */
> > +#endif
> > + .word 0xcafec0d3; /* Simple
> > checksum(2B),spare offset(2B) */
> > nop;
> >
> > b reset; /* SoCFPGA jumps here */
> >
>
next prev parent reply other threads:[~2017-09-26 4:42 UTC|newest]
Thread overview: 88+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-25 8:39 [U-Boot] [PATCH v2 00/19] Add FPGA, SDRAM, SPL loads U-boot & booting to console tien.fong.chee at intel.com
2017-09-25 8:39 ` [U-Boot] [PATCH v2 01/19] ARM: socfpga: add bindings doc for arria10 fpga manager tien.fong.chee at intel.com
2017-09-25 8:59 ` Marek Vasut
2017-09-25 8:39 ` [U-Boot] [PATCH v2 02/19] doc: dtbinding: Description on FPGA RBF properties at Arria 10 FPGA manager tien.fong.chee at intel.com
2017-09-25 9:00 ` Marek Vasut
2017-09-26 8:54 ` Chee, Tien Fong
2017-09-26 10:30 ` Marek Vasut
2017-09-27 3:12 ` Chee, Tien Fong
2017-09-27 8:29 ` Marek Vasut
2017-09-28 2:49 ` Chee, Tien Fong
2017-09-25 9:01 ` Marek Vasut
2017-09-26 8:32 ` Chee, Tien Fong
2017-09-25 8:39 ` [U-Boot] [PATCH v2 03/19] dts: Add FPGA bitstream properties to Arria 10 DTS tien.fong.chee at intel.com
2017-09-25 8:40 ` [U-Boot] [PATCH v2 04/19] arm: socfpga: Add Arria 10 SoCFPGA programming interface tien.fong.chee at intel.com
2017-09-25 9:03 ` Marek Vasut
2017-09-29 7:42 ` Chee, Tien Fong
2017-09-25 8:40 ` [U-Boot] [PATCH v2 05/19] arm: socfpga: Enhance FPGA program write rbf data with size >= 4 bytes tien.fong.chee at intel.com
2017-09-25 9:08 ` Marek Vasut
2017-09-25 8:40 ` [U-Boot] [PATCH v2 06/19] dts: Enable fpga-mgr node build for Arria 10 SPL tien.fong.chee at intel.com
2017-09-25 8:40 ` [U-Boot] [PATCH v2 07/19] fdt: Add compatible strings for Arria 10 tien.fong.chee at intel.com
2017-09-25 9:08 ` Marek Vasut
2017-12-10 19:34 ` Simon Glass
2017-09-25 8:40 ` [U-Boot] [PATCH v2 08/19] fs: Enable generic filesystems interface support in SPL tien.fong.chee at intel.com
2017-09-25 9:09 ` Marek Vasut
2017-10-09 4:47 ` Simon Glass
2017-09-25 8:40 ` [U-Boot] [PATCH v2 09/19] arm: socfpga: Add drivers for programing FPGA from flash tien.fong.chee at intel.com
2017-09-25 9:14 ` Marek Vasut
2017-09-26 8:30 ` Chee, Tien Fong
2017-09-26 10:32 ` Marek Vasut
2017-09-27 6:05 ` Chee, Tien Fong
2017-09-27 8:30 ` Marek Vasut
2017-09-28 2:45 ` Chee, Tien Fong
2017-09-26 9:52 ` Chee, Tien Fong
2017-09-26 10:39 ` Marek Vasut
2017-09-27 9:13 ` Chee, Tien Fong
2017-09-27 9:23 ` Marek Vasut
2017-09-28 15:14 ` Chee, Tien Fong
2017-09-28 15:18 ` Marek Vasut
2017-10-09 4:47 ` Simon Glass
2017-09-25 8:40 ` [U-Boot] [PATCH v2 10/19] arm: socfpga: Rename the gen5 sdram driver to more specific name tien.fong.chee at intel.com
2017-09-25 9:15 ` Marek Vasut
2017-09-26 8:23 ` Chee, Tien Fong
2017-09-26 10:33 ` Marek Vasut
2017-09-27 5:06 ` Chee, Tien Fong
2017-09-25 8:40 ` [U-Boot] [PATCH v2 11/19] arm: socfpga: Add DRAM bank size initialization function tien.fong.chee at intel.com
2017-09-25 9:15 ` Marek Vasut
2017-09-26 8:20 ` Chee, Tien Fong
2017-09-26 10:33 ` Marek Vasut
2017-10-02 10:01 ` Chee, Tien Fong
2017-10-02 10:04 ` Marek Vasut
2017-10-02 10:06 ` Chee, Tien Fong
2017-10-03 3:30 ` Ley Foon Tan
2017-09-25 8:40 ` [U-Boot] [PATCH v2 12/19] arm: socfpga: Add DDR driver for Arria 10 tien.fong.chee at intel.com
2017-09-25 9:19 ` Marek Vasut
2017-09-26 8:20 ` Chee, Tien Fong
2017-09-26 10:35 ` Marek Vasut
2017-09-27 4:55 ` Chee, Tien Fong
2017-09-25 8:40 ` [U-Boot] [PATCH v2 13/19] configs: Add DDR Kconfig support " tien.fong.chee at intel.com
2017-09-25 8:40 ` [U-Boot] [PATCH v2 14/19] arm: socfpga: Enable build for DDR " tien.fong.chee at intel.com
2017-09-25 9:20 ` Marek Vasut
2017-09-26 5:06 ` Chee, Tien Fong
2017-09-25 8:40 ` [U-Boot] [PATCH v2 15/19] arm: socfpga: Add support to memory allocation in SPL tien.fong.chee at intel.com
2017-09-25 9:21 ` Marek Vasut
2017-09-26 5:06 ` Chee, Tien Fong
2017-09-26 10:37 ` Marek Vasut
2017-09-27 5:43 ` Chee, Tien Fong
2017-09-27 8:32 ` Marek Vasut
2017-09-28 2:48 ` Chee, Tien Fong
2017-09-25 8:40 ` [U-Boot] [PATCH v2 16/19] arm: socfpga: Enhance Intel SoCFPGA program header to support Arria 10 tien.fong.chee at intel.com
2017-09-25 9:23 ` Marek Vasut
2017-09-26 4:42 ` Chee, Tien Fong [this message]
2017-09-26 10:37 ` Marek Vasut
2017-09-27 3:30 ` Chee, Tien Fong
2017-09-27 8:33 ` Marek Vasut
2017-09-28 2:46 ` Chee, Tien Fong
2017-09-25 8:40 ` [U-Boot] [PATCH v2 17/19] arm: socfpga: Adding clock frequency info for U-boot tien.fong.chee at intel.com
2017-09-25 9:23 ` Marek Vasut
2017-09-26 4:32 ` Chee, Tien Fong
2017-09-27 3:24 ` Chee, Tien Fong
2017-10-02 10:04 ` Chee, Tien Fong
2017-10-02 10:10 ` Marek Vasut
2017-10-02 10:25 ` Chee, Tien Fong
2017-09-25 8:40 ` [U-Boot] [PATCH v2 18/19] arm: socfpga: Adding SoCFPGA info for both SPL and U-boot tien.fong.chee at intel.com
2017-09-25 8:40 ` [U-Boot] [PATCH v2 19/19] arm: socfpga: Enable SPL loading U-boot to DDR and booting U-boot tien.fong.chee at intel.com
2017-09-25 9:24 ` Marek Vasut
2017-09-26 4:31 ` Chee, Tien Fong
2017-09-26 10:38 ` Marek Vasut
2017-09-27 3:14 ` Chee, Tien Fong
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