From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chee, Tien Fong Date: Wed, 27 Sep 2017 03:30:04 +0000 Subject: [U-Boot] [PATCH v2 16/19] arm: socfpga: Enhance Intel SoCFPGA program header to support Arria 10 In-Reply-To: <18dda297-48b7-48ef-612e-d5d3ad906418@denx.de> References: <1506328815-23733-1-git-send-email-tien.fong.chee@intel.com> <1506328815-23733-17-git-send-email-tien.fong.chee@intel.com> <74b5459c-f4c4-7457-d041-1a12833e23a8@denx.de> <1506400929.27760.7.camel@intel.com> <18dda297-48b7-48ef-612e-d5d3ad906418@denx.de> Message-ID: <1506483003.3589.10.camel@intel.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit To: u-boot@lists.denx.de On Sel, 2017-09-26 at 12:37 +0200, Marek Vasut wrote: > On 09/26/2017 06:42 AM, Chee, Tien Fong wrote: > > > > On Isn, 2017-09-25 at 11:23 +0200, Marek Vasut wrote: > > > > > > On 09/25/2017 10:40 AM, tien.fong.chee at intel.com wrote: > > > > > > > > > > > > From: Tien Fong Chee > > > > > > > > Enhance preloader header with both additional program length > > > > and > > > > program > > > > entry offset attributes, which offset is relative to the start > > > > of > > > > program > > > > header. > > > > > > > > Signed-off-by: Tien Fong Chee > > > > --- > > > >  arch/arm/mach-socfpga/include/mach/boot0.h | 11 +++++++++-- > > > >  1 file changed, 9 insertions(+), 2 deletions(-) > > > > > > > > diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h > > > > b/arch/arm/mach-socfpga/include/mach/boot0.h > > > > index 22d9e7f..33c9368 100644 > > > > --- a/arch/arm/mach-socfpga/include/mach/boot0.h > > > > +++ b/arch/arm/mach-socfpga/include/mach/boot0.h > > > > @@ -11,8 +11,15 @@ > > > >   .balignl 64,0xf33db33f; > > > >   > > > >   .word 0x1337c0d3; /* SoCFPGA preloader > > > > validation word */ > > > > - .word 0xc01df00d; /* Version, flags, > > > > length > > > > */ > > > > - .word 0xcafec0d3; /* Checksum, zero-pad > > > > */ > > > > + .word 0xc01df00d; /* Header > > > > length(2B),flags(1B),version(1B) */ > > > > +#ifndef CONFIG_TARGET_SOCFPGA_GEN5 > > > > + .word 0xfeedface; /* Program length(4B) */ > > > Keep this indent intact, then it won't generate these crappy - > > > entries. > > > > > Are you saying to keep the comment indent intact, and allign with > > 1st > > comment  /* SoCFPGA preloader validation word */ ? > Just look at the diff and make sure that it only changes the relevant > parts, not extras due to indent changes. > Not get you, which particular change is due to indent changes only? Some changes are for re-writing more descriptive comment. And some new adding header attributes to support Arria 10. > > > > > > > > > > > > > > > > > + .word 0xf00dcafe; /* > > > > +      * Program entry > > > > offset(4B),relative > > > > to > > > > +      * the start of program header > > > > +      */ > > > > +#endif > > > > + .word 0xcafec0d3; /* Simple > > > > checksum(2B),spare offset(2B) */ > > > >   nop; > > > >   > > > >   b reset; /* SoCFPGA jumps here */ > > > > >