From mboxrd@z Thu Jan  1 00:00:00 1970
From: See, Chin Liang <chin.liang.see@intel.com>
Date: Fri, 29 Sep 2017 12:51:58 +0000
Subject: [U-Boot] [PATCH 06/14] arm: socfpga: stratix10: Add misc
 support for Stratix10 SoC
In-Reply-To: <CADhT+weDn14XjOF4i6ucLvin7LtS1C_hEu9gYrMsfhr09kDRjg@mail.gmail.com>
References: <1505812951-25088-1-git-send-email-chin.liang.see@intel.com>
 <1505812951-25088-7-git-send-email-chin.liang.see@intel.com>
 <CADhT+weDn14XjOF4i6ucLvin7LtS1C_hEu9gYrMsfhr09kDRjg@mail.gmail.com>
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On Tue, 2017-09-26 at 17:46 -0500, Dinh Nguyen wrote:
> On Tue, Sep 19, 2017 at 4:22 AM,  <chin.liang.see@intel.com> wrote:
> > 
> > From: Chin Liang See <chin.liang.see@intel.com>
> > 
> > Add misc support for Stratix SoC
> Just because the file is call misc.c doesn't mean you can just keep
> the commit
> message that simple. Can you add what functions are you adding?
> 

Definitely can add more details here

> > 
> > 
> > Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
> > ---
> >  arch/arm/mach-socfpga/Makefile   |   1 +
> >  arch/arm/mach-socfpga/misc.c     |   4 +
> >  arch/arm/mach-socfpga/misc_s10.c | 165
> > +++++++++++++++++++++++++++++++++++++++
> >  3 files changed, 170 insertions(+)
> >  create mode 100644 arch/arm/mach-socfpga/misc_s10.c
> > 
> > diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-
> > socfpga/Makefile
> > index 910eb6f..b253914 100644
> > --- a/arch/arm/mach-socfpga/Makefile
> > +++ b/arch/arm/mach-socfpga/Makefile
> > @@ -32,6 +32,7 @@ endif
> > 
> >  ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
> >  obj-y  += clock_manager_s10.o
> > +obj-y  += misc_s10.o
> >  obj-y  += reset_manager_s10.o
> >  obj-y  += system_manager_s10.o
> >  obj-y  += wrap_pinmux_config_s10.o
> > diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-
> > socfpga/misc.c
> > index 00eff90..2ea94bc 100644
> > --- a/arch/arm/mach-socfpga/misc.c
> > +++ b/arch/arm/mach-socfpga/misc.c
> > @@ -23,8 +23,10 @@
> > 
> >  DECLARE_GLOBAL_DATA_PTR;
> > 
> > +#ifdef CONFIG_SYS_L2_PL310
> >  static const struct pl310_regs *const pl310 =
> >         (struct pl310_regs *)CONFIG_SYS_PL310_BASE;
> > +#endif
> > 
> >  struct bsel bsel_str[] = {
> >         { "rsvd", "Reserved", },
> > @@ -53,6 +55,7 @@ void enable_caches(void)
> >  #endif
> >  }
> > 
> > +#ifdef CONFIG_SYS_L2_PL310
> >  void v7_outer_cache_enable(void)
> >  {
> >         /* Disable the L2 cache */
> > @@ -73,6 +76,7 @@ void v7_outer_cache_disable(void)
> >         /* Disable the L2 cache */
> >         clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN);
> >  }
> > +#endif
> > 
> >  #if defined(CONFIG_SYS_CONSOLE_IS_IN_ENV) && \
> >  defined(CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE)
> > diff --git a/arch/arm/mach-socfpga/misc_s10.c b/arch/arm/mach-
> > socfpga/misc_s10.c
> > new file mode 100644
> > index 0000000..b84f055
> > --- /dev/null
> > +++ b/arch/arm/mach-socfpga/misc_s10.c
> This misc_s10.c look very similar to the Gen5 stuff, can you re-use
> it?

Yes, its true.
Let me move eth stuff to common.

Chin Liang

> 
> Dinh