From mboxrd@z Thu Jan  1 00:00:00 1970
From: See, Chin Liang <chin.liang.see@intel.com>
Date: Fri, 29 Sep 2017 12:53:27 +0000
Subject: [U-Boot] [PATCH 04/14] arm: socfpga: stratix10: Add Reset
 Manager driver for Stratix10 SoC
In-Reply-To: <CADhT+weA-bgdwN+AxPDhyybQHfWqQhQd1zqc0qx-5SFWBMX8qw@mail.gmail.com>
References: <1505812951-25088-1-git-send-email-chin.liang.see@intel.com>
 <1505812951-25088-5-git-send-email-chin.liang.see@intel.com>
 <CADhT+weA-bgdwN+AxPDhyybQHfWqQhQd1zqc0qx-5SFWBMX8qw@mail.gmail.com>
Message-ID: <1506776055.2766.3.camel@intel.com>
List-Id: <u-boot.lists.denx.de>
MIME-Version: 1.0
Content-Type: text/plain; charset="utf-8"
Content-Transfer-Encoding: 8bit
To: u-boot@lists.denx.de

On Tue, 2017-09-26 at 17:08 -0500, Dinh Nguyen wrote:
> On Tue, Sep 19, 2017 at 4:22 AM,  <chin.liang.see@intel.com> wrote:
> > 
> > From: Chin Liang See <chin.liang.see@intel.com>
> > 
> > Add Reset Manager driver support for Stratix SoC
> > 
> > Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
> > ---
> >  arch/arm/mach-socfpga/Makefile                     |   1 +
> >  arch/arm/mach-socfpga/include/mach/reset_manager.h |   2 +
> >  .../mach-socfpga/include/mach/reset_manager_s10.h  | 116
> > +++++++++++++++++
> >  arch/arm/mach-socfpga/reset_manager.c              |   5 +
> >  arch/arm/mach-socfpga/reset_manager_s10.c          | 140
> > +++++++++++++++++++++
> I don't see why you need to add a new file for S10? The functionality
> between
> Gen 5 and Stratix10 is identical for the reset manager.

Not really, they have same functions name but sequences are difference
due to diff interconnect technology. Hence, try to avoid too much #if
#else

Chin Liang

> 
> Dinh