[U-Boot] [RESEND PATCH v3 15/20] rockchip: add rk3036 sdram driver

[Heiko Stuebner <heiko@sntech.de>]

Hi Simon,

Am Freitag, 6. November 2015, 04:08:51 schrieb Simon Glass:
> Hi Lin,
> 
> On 6 November 2015 at 01:53, Lin Huang <hl@rock-chips.com> wrote:
> > add rk3036 sdram driver so we can set up sdram in SPL
> >
> > Signed-off-by: Lin Huang <hl@rock-chips.com>
> > ---
> > Changes in v1: None
> > Changes in v2: None
> > Changes in v3: fix some code style error
> >
> >  arch/arm/include/asm/arch-rockchip/sdram_rk3036.h | 336 ++++++++++
> >  arch/arm/mach-rockchip/rk3036/Makefile            |   2 +
> >  arch/arm/mach-rockchip/rk3036/sdram_rk3036.c      | 729 
++++++++++++++++++++++
> >  3 files changed, 1067 insertions(+)
> >  create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_rk3036.h
> >  create mode 100644 arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
> >
> 
> Does this driver have nothing in common with the rk3288 one? I thought
> someone mentioned that they had similar IP.

That would probably be me ;-) . pctl is the same (judging by PCTL_IPTR a 
Designware uPCTL), the ddr-phy is new.

But the devicetree-description of the ddr-controller you got from ChromeOS 
also doesn't follow dt conventions and the binding is very much implementation 
specific, so will change in the future anyway.

My current idea is to string components together using of-graph [0] on the 
kernel side. But that is still in its very early stages.

So personally I'd go for leaving that as is now and reworking after we have a 
plan of how the real end-result should look, instead of introducing another 
intermediate step :-) ?


Heiko


[0] https://github.com/mmind/linux-rockchip/blob/a65b13713575ae2acdd5d856495a3dac6478d92d/arch/arm/boot/dts/rk3288.dtsi#L534