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From: Chee, Tien Fong <tien.fong.chee@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v3 18/20] arm: socfpga: Enable function visible to other file
Date: Mon, 23 Oct 2017 08:19:03 +0000	[thread overview]
Message-ID: <1508746742.3650.52.camel@intel.com> (raw)
In-Reply-To: <e50d2b9d-2726-a78d-65b0-521272287202@kernel.org>

On Jum, 2017-10-20 at 09:39 -0500, Dinh Nguyen wrote:
> 
> On 10/13/2017 03:08 AM, tien.fong.chee at intel.com wrote:
> > 
> > From: Tien Fong Chee <tien.fong.chee@intel.com>
> > 
> > Enable function visible to other file, so it can be used by other
> > functions from other file.
> Huh? What function? What other file? Why?
> 
> Please bear in mind for future patches, when reading the commit
> message,
> you should have a good idea of what the patch is doing without even
> looking at the patch.
> 
> Need to include more people listed in get_maintainer.pl
> 
> Maybe Marek has already commented, but this patch can be separated
> out
> from the A10 series.
> 
> Also, the commit header "arm:socfpga: Enable function visible to
> other
> file" is horrible and this patch has nothing to do with socfpga.
> 
This patch is required by later patches, so this patch can't be
separated out. This function is static declaration, but this function
is required by the caller from other file(later patches). So, this
patch is to remove ths static declaration so it is accessible by the
caller from other file.

> Dinh

  reply	other threads:[~2017-10-23  8:19 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-13  8:08 [U-Boot] [PATCH v3 00/20] Add FPGA, SDRAM, SPL loadfs U-boot & booting to console tien.fong.chee at intel.com
2017-10-13  8:08 ` [U-Boot] [PATCH v3 01/20] ARM: socfpga: Description on FPGA RBF properties at Arria 10 FPGA manager tien.fong.chee at intel.com
2017-10-13  8:08 ` [U-Boot] [PATCH v3 02/20] dts: Add FPGA bitstream properties to Arria 10 DTS tien.fong.chee at intel.com
2017-10-13  8:08 ` [U-Boot] [PATCH v3 03/20] arm: socfpga: Add Arria 10 SoCFPGA programming interface tien.fong.chee at intel.com
2017-10-16 12:39   ` Dinh Nguyen
2017-10-23  6:46     ` Chee, Tien Fong
2017-10-23  7:04   ` Chee, Tien Fong
2017-10-13  8:08 ` [U-Boot] [PATCH v3 04/20] dts: Enable fpga-mgr node build for Arria 10 SPL tien.fong.chee at intel.com
2017-10-13  8:08 ` [U-Boot] [PATCH v3 05/20] fs: Enable generic filesystems interface support in SPL tien.fong.chee at intel.com
2017-10-13  8:08 ` [U-Boot] [PATCH v3 06/20] common: Generic firmware loader for file system tien.fong.chee at intel.com
2017-10-16 14:08   ` Dinh Nguyen
2017-10-16 14:41     ` Marek Vasut
2017-10-23  6:37       ` Chee, Tien Fong
2017-10-26 12:51         ` Lukasz Majewski
2017-10-27  9:23           ` Chee, Tien Fong
2017-10-27 10:35             ` Lukasz Majewski
2017-10-28 11:32               ` Marek Vasut
2017-10-28 21:43                 ` Lukasz Majewski
2017-10-29  9:35                   ` Marek Vasut
2017-10-29 22:57                     ` Lukasz Majewski
2017-10-29 22:59                       ` Marek Vasut
2017-10-13  8:08 ` [U-Boot] [PATCH v3 07/20] arm: socfpga: Fix with the correct polling status bit tien.fong.chee at intel.com
2017-10-16 15:29   ` Dinh Nguyen
2017-10-23  6:49     ` Chee, Tien Fong
2017-10-13  8:08 ` [U-Boot] [PATCH v3 08/20] arm: socfpga: Add drivers for programing FPGA from flash tien.fong.chee at intel.com
2017-10-16 15:33   ` Dinh Nguyen
2017-10-24  5:52     ` Chee, Tien Fong
2017-10-13  8:08 ` [U-Boot] [PATCH v3 09/20] arm: socfpga: Rename the gen5 sdram driver to more specific name tien.fong.chee at intel.com
2017-10-13  8:08 ` [U-Boot] [PATCH v3 10/20] arm: socfpga: Add DRAM bank size initialization function tien.fong.chee at intel.com
2017-10-13  8:08 ` [U-Boot] [PATCH v3 11/20] arm: socfpga: Add DDR driver for Arria 10 tien.fong.chee at intel.com
2017-10-17  3:08   ` Dinh Nguyen
2017-10-23  7:45     ` Chee, Tien Fong
2017-10-13  8:08 ` [U-Boot] [PATCH v3 12/20] configs: Add DDR Kconfig support " tien.fong.chee at intel.com
2017-10-17  3:21   ` Dinh Nguyen
2017-10-13  8:08 ` [U-Boot] [PATCH v3 13/20] arm: socfpga: Enable SPL memory allocation tien.fong.chee at intel.com
2017-10-17  3:44   ` Dinh Nguyen
2017-10-13  8:08 ` [U-Boot] [PATCH v3 14/20] arm: socfpga: Improve comments for Intel SoCFPGA program header tien.fong.chee at intel.com
2017-10-20 14:18   ` Dinh Nguyen
2017-10-13  8:08 ` [U-Boot] [PATCH v3 15/20] arm: socfpga: Enhance Intel SoCFPGA program header to support Arria 10 tien.fong.chee at intel.com
2017-10-20 14:19   ` Dinh Nguyen
2017-10-13  8:08 ` [U-Boot] [PATCH v3 16/20] arm: socfpga: Adding clock frequency info for U-boot tien.fong.chee at intel.com
2017-10-20 14:29   ` Dinh Nguyen
2017-10-23  8:02     ` Chee, Tien Fong
2017-10-13  8:08 ` [U-Boot] [PATCH v3 17/20] arm: socfpga: Adding SoCFPGA info for both SPL and U-boot tien.fong.chee at intel.com
2017-10-20 14:33   ` Dinh Nguyen
2017-10-23  8:13     ` Chee, Tien Fong
2017-10-13  8:08 ` [U-Boot] [PATCH v3 18/20] arm: socfpga: Enable function visible to other file tien.fong.chee at intel.com
2017-10-20 14:39   ` Dinh Nguyen
2017-10-23  8:19     ` Chee, Tien Fong [this message]
2017-10-23 14:24       ` Dinh Nguyen
2017-10-24  5:11         ` Chee, Tien Fong
2017-10-13  8:08 ` [U-Boot] [PATCH v3 19/20] arm: socfpga: Enable DDR working tien.fong.chee at intel.com
2017-10-20 15:11   ` Dinh Nguyen
2017-10-24  5:34     ` Chee, Tien Fong
2017-10-13  8:08 ` [U-Boot] [PATCH v3 20/20] arm: socfpga: Enable SPL booting U-boot tien.fong.chee at intel.com
2017-10-20 15:21   ` Dinh Nguyen
2017-10-24  5:37     ` Chee, Tien Fong

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