From: Andes <uboot@andestech.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] travis.yml: Support RISC-V
Date: Fri, 12 Jan 2018 14:57:09 +0800 [thread overview]
Message-ID: <1515740229-4282-1-git-send-email-uboot@andestech.com> (raw)
From: Rick Chen <rick@andestech.com>
Enable travis-ci support with a link having built.
Signed-off-by: Chih-Mao Chen <cmchen@andestech.com>
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
---
.travis.yml | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/.travis.yml b/.travis.yml
index 8a220cc..a53e7c6 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -78,6 +78,11 @@ before_script:
tar -C /tmp -xf gcc-linaro-6.3.1-2017.02-x86_64_aarch64-linux-gnu.tar.xz &&
tar -C /tmp -xf gcc-linaro-6.3.1-2017.02-x86_64_arm-linux-gnueabihf.tar.xz;
fi
+ - if [[ "${TOOLCHAIN}" == "riscv" ]]; then
+ wget https://github.com/PkmX/riscv-prebuilt-toolchains/releases/download/20180111/riscv32-unknown-elf-toolchain.tar.gz &&
+ tar -C /tmp -xf riscv32-unknown-elf-toolchain.tar.gz &&
+ echo -e "\n[toolchain-prefix]\nriscv = /tmp/riscv32-unknown-elf/bin/riscv32-unknown-elf-" >> ~/.buildman;
+ fi
- if [[ "${QEMU_TARGET}" != "" ]]; then
git clone git://git.qemu.org/qemu.git /tmp/qemu;
pushd /tmp/qemu;
@@ -251,6 +256,9 @@ matrix:
- env:
- BUILDMAN="xtensa"
TOOLCHAIN="xtensa"
+ - env:
+ - BUILDMAN="riscv"
+ TOOLCHAIN="riscv"
# QA jobs for code analytics
# static code analysis with cppcheck (we can add --enable=all later)
--
2.7.4
next reply other threads:[~2018-01-12 6:57 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-12 6:57 Andes [this message]
2018-01-15 13:53 ` [U-Boot] travis.yml: Support RISC-V Tom Rini
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