* [U-Boot] [PATCH 2/2] arm: socfpga: cyclone5: Ensure spi-flash in the compatible string
@ 2018-02-21 7:40 chin.liang.see at intel.com
2018-02-21 9:34 ` Simon Goldschmidt
0 siblings, 1 reply; 3+ messages in thread
From: chin.liang.see at intel.com @ 2018-02-21 7:40 UTC (permalink / raw)
To: u-boot
From: Chin Liang See <chin.liang.see@intel.com>
Ensure "spi-flash" is added into compatible string when there is
NOR flash being instantiated in DTS. Discovered "sf probe" command
without argument would hit error if spi-flash compatible string
is missing.
Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
---
arch/arm/dts/socfpga_cyclone5_is1.dts | 2 +-
arch/arm/dts/socfpga_cyclone5_socdk.dts | 2 +-
arch/arm/dts/socfpga_cyclone5_socrates.dts | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/socfpga_cyclone5_is1.dts b/arch/arm/dts/socfpga_cyclone5_is1.dts
index 2e2b71f..549024c 100644
--- a/arch/arm/dts/socfpga_cyclone5_is1.dts
+++ b/arch/arm/dts/socfpga_cyclone5_is1.dts
@@ -87,7 +87,7 @@
u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
- compatible = "n25q00";
+ compatible = "n25q00","spi-flash";
reg = <0>; /* chip select */
spi-max-frequency = <100000000>;
m25p,fast-read;
diff --git a/arch/arm/dts/socfpga_cyclone5_socdk.dts b/arch/arm/dts/socfpga_cyclone5_socdk.dts
index 95a8e65..e30bf9a 100644
--- a/arch/arm/dts/socfpga_cyclone5_socdk.dts
+++ b/arch/arm/dts/socfpga_cyclone5_socdk.dts
@@ -98,7 +98,7 @@
u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
- compatible = "n25q00";
+ compatible = "n25q00","spi-flash";
reg = <0>; /* chip select */
spi-max-frequency = <100000000>;
m25p,fast-read;
diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts b/arch/arm/dts/socfpga_cyclone5_socrates.dts
index e3ae8a8..3e78038 100644
--- a/arch/arm/dts/socfpga_cyclone5_socrates.dts
+++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts
@@ -68,7 +68,7 @@
flash0: n25q00 at 0 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "n25q00";
+ compatible = "n25q00","spi-flash";
reg = <0>; /* chip select */
spi-max-frequency = <50000000>;
m25p,fast-read;
--
2.2.2
^ permalink raw reply related [flat|nested] 3+ messages in thread* [U-Boot] [PATCH 2/2] arm: socfpga: cyclone5: Ensure spi-flash in the compatible string
2018-02-21 7:40 [U-Boot] [PATCH 2/2] arm: socfpga: cyclone5: Ensure spi-flash in the compatible string chin.liang.see at intel.com
@ 2018-02-21 9:34 ` Simon Goldschmidt
2018-02-21 14:01 ` See, Chin Liang
0 siblings, 1 reply; 3+ messages in thread
From: Simon Goldschmidt @ 2018-02-21 9:34 UTC (permalink / raw)
To: u-boot
On 21.02.2018 08:40, chin.liang.see at intel.com wrote:
> From: Chin Liang See <chin.liang.see@intel.com>
>
> Ensure "spi-flash" is added into compatible string when there is
> NOR flash being instantiated in DTS. Discovered "sf probe" command
> without argument would hit error if spi-flash compatible string
> is missing.
This has already been fixed 5 days ago.
Simon
>
> Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
> ---
> arch/arm/dts/socfpga_cyclone5_is1.dts | 2 +-
> arch/arm/dts/socfpga_cyclone5_socdk.dts | 2 +-
> arch/arm/dts/socfpga_cyclone5_socrates.dts | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/dts/socfpga_cyclone5_is1.dts b/arch/arm/dts/socfpga_cyclone5_is1.dts
> index 2e2b71f..549024c 100644
> --- a/arch/arm/dts/socfpga_cyclone5_is1.dts
> +++ b/arch/arm/dts/socfpga_cyclone5_is1.dts
> @@ -87,7 +87,7 @@
> u-boot,dm-pre-reloc;
> #address-cells = <1>;
> #size-cells = <1>;
> - compatible = "n25q00";
> + compatible = "n25q00","spi-flash";
> reg = <0>; /* chip select */
> spi-max-frequency = <100000000>;
> m25p,fast-read;
> diff --git a/arch/arm/dts/socfpga_cyclone5_socdk.dts b/arch/arm/dts/socfpga_cyclone5_socdk.dts
> index 95a8e65..e30bf9a 100644
> --- a/arch/arm/dts/socfpga_cyclone5_socdk.dts
> +++ b/arch/arm/dts/socfpga_cyclone5_socdk.dts
> @@ -98,7 +98,7 @@
> u-boot,dm-pre-reloc;
> #address-cells = <1>;
> #size-cells = <1>;
> - compatible = "n25q00";
> + compatible = "n25q00","spi-flash";
> reg = <0>; /* chip select */
> spi-max-frequency = <100000000>;
> m25p,fast-read;
> diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts b/arch/arm/dts/socfpga_cyclone5_socrates.dts
> index e3ae8a8..3e78038 100644
> --- a/arch/arm/dts/socfpga_cyclone5_socrates.dts
> +++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts
> @@ -68,7 +68,7 @@
> flash0: n25q00 at 0 {
> #address-cells = <1>;
> #size-cells = <1>;
> - compatible = "n25q00";
> + compatible = "n25q00","spi-flash";
> reg = <0>; /* chip select */
> spi-max-frequency = <50000000>;
> m25p,fast-read;
^ permalink raw reply [flat|nested] 3+ messages in thread* [U-Boot] [PATCH 2/2] arm: socfpga: cyclone5: Ensure spi-flash in the compatible string
2018-02-21 9:34 ` Simon Goldschmidt
@ 2018-02-21 14:01 ` See, Chin Liang
0 siblings, 0 replies; 3+ messages in thread
From: See, Chin Liang @ 2018-02-21 14:01 UTC (permalink / raw)
To: u-boot
On Wed, 2018-02-21 at 10:34 +0100, Simon Goldschmidt wrote:
> On 21.02.2018 08:40, chin.liang.see at intel.com wrote:
> >
> > From: Chin Liang See <chin.liang.see@intel.com>
> >
> > Ensure "spi-flash" is added into compatible string when there is
> > NOR flash being instantiated in DTS. Discovered "sf probe" command
> > without argument would hit error if spi-flash compatible string
> > is missing.
> This has already been fixed 5 days ago.
>
Nice and thanks for the patch.
I was pulling from the source few days back for enabling the Macronix
flash and bumping into this same issue.
Thanks
Chin Liang
> Simon
>
> >
> >
> > Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
> > ---
> > arch/arm/dts/socfpga_cyclone5_is1.dts | 2 +-
> > arch/arm/dts/socfpga_cyclone5_socdk.dts | 2 +-
> > arch/arm/dts/socfpga_cyclone5_socrates.dts | 2 +-
> > 3 files changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/arm/dts/socfpga_cyclone5_is1.dts
> > b/arch/arm/dts/socfpga_cyclone5_is1.dts
> > index 2e2b71f..549024c 100644
> > --- a/arch/arm/dts/socfpga_cyclone5_is1.dts
> > +++ b/arch/arm/dts/socfpga_cyclone5_is1.dts
> > @@ -87,7 +87,7 @@
> > u-boot,dm-pre-reloc;
> > #address-cells = <1>;
> > #size-cells = <1>;
> > - compatible = "n25q00";
> > + compatible = "n25q00","spi-flash";
> > reg = <0>; /* chip select */
> > spi-max-frequency = <100000000>;
> > m25p,fast-read;
> > diff --git a/arch/arm/dts/socfpga_cyclone5_socdk.dts
> > b/arch/arm/dts/socfpga_cyclone5_socdk.dts
> > index 95a8e65..e30bf9a 100644
> > --- a/arch/arm/dts/socfpga_cyclone5_socdk.dts
> > +++ b/arch/arm/dts/socfpga_cyclone5_socdk.dts
> > @@ -98,7 +98,7 @@
> > u-boot,dm-pre-reloc;
> > #address-cells = <1>;
> > #size-cells = <1>;
> > - compatible = "n25q00";
> > + compatible = "n25q00","spi-flash";
> > reg = <0>; /* chip select */
> > spi-max-frequency = <100000000>;
> > m25p,fast-read;
> > diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts
> > b/arch/arm/dts/socfpga_cyclone5_socrates.dts
> > index e3ae8a8..3e78038 100644
> > --- a/arch/arm/dts/socfpga_cyclone5_socrates.dts
> > +++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts
> > @@ -68,7 +68,7 @@
> > flash0: n25q00 at 0 {
> > #address-cells = <1>;
> > #size-cells = <1>;
> > - compatible = "n25q00";
> > + compatible = "n25q00","spi-flash";
> > reg = <0>; /* chip select */
> > spi-max-frequency = <50000000>;
> > m25p,fast-read;
^ permalink raw reply [flat|nested] 3+ messages in thread
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2018-02-21 7:40 [U-Boot] [PATCH 2/2] arm: socfpga: cyclone5: Ensure spi-flash in the compatible string chin.liang.see at intel.com
2018-02-21 9:34 ` Simon Goldschmidt
2018-02-21 14:01 ` See, Chin Liang
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