From mboxrd@z Thu Jan  1 00:00:00 1970
From: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
Date: Wed, 21 Mar 2018 19:07:05 +0000
Subject: [U-Boot] [PATCH 0/5] DW SPI: fixes and improvements
In-Reply-To: <CAD6G_RQBGYMdDc+KnR3U3nuSKiHgcZ0xeybqEHnYkDU+AofPVQ@mail.gmail.com>
References: <20180305131719.3059-1-Eugeniy.Paltsev@synopsys.com>
 <CAD6G_RTyk-Vd_=rNrD6agKtXYfP=zVz23L0_-x1aRaz42sFupg@mail.gmail.com>
 <CAD6G_RQBGYMdDc+KnR3U3nuSKiHgcZ0xeybqEHnYkDU+AofPVQ@mail.gmail.com>
Message-ID: <1521659224.9805.52.camel@synopsys.com>
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To: u-boot@lists.denx.de

Hi Jagan,

On Thu, 2018-03-22 at 00:04 +0530, Jagan Teki wrote:
> On Tue, Mar 13, 2018 at 8:44 PM, Jagan Teki <jagannadh.teki@gmail.com> wrote:
> > On Mon, Mar 5, 2018 at 6:47 PM, Eugeniy Paltsev
> > <Eugeniy.Paltsev@synopsys.com> wrote:
> > > Various fixes and improvements of designware spi driver.
> > > 
> > > Eugeniy Paltsev (5):
> > >   DW SPI: fix tx data loss on FIFO flush
> > >   DW SPI: fix transmit only mode
> > >   DW SPI: refactor poll_transfer functions
> > >   DW SPI: add option to use external gpio for chip select
> > >   DW SPI: use 32 bit access instead of 16 and 32 bit mix
> > 
> > Can someone test this series?

We did test it on or platform (Synopsys HSDK) where it works just fine.

-Alexey