From mboxrd@z Thu Jan  1 00:00:00 1970
From: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
Date: Thu, 22 Mar 2018 17:35:38 +0000
Subject: [U-Boot] [PATCH v2 0/5] DW SPI: fixes and improvements
In-Reply-To: <CAD6G_RSwXeGUacEhhA9scLU=twFvxFezLr6i259KLzgUWL7GVQ@mail.gmail.com>
References: <20180322105047.15915-1-Eugeniy.Paltsev@synopsys.com>
 <CAD6G_RSwXeGUacEhhA9scLU=twFvxFezLr6i259KLzgUWL7GVQ@mail.gmail.com>
Message-ID: <1521740138.3277.34.camel@synopsys.com>
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To: u-boot@lists.denx.de

Hi Jagan,

On Thu, 2018-03-22 at 23:03 +0530, Jagan Teki wrote:
> On Thu, Mar 22, 2018 at 4:20 PM, Eugeniy Paltsev
> <Eugeniy.Paltsev@synopsys.com> wrote:
> > Various fixes and improvements of designware spi driver.
> > 
> > Changes v1->v2:
> >   * Use readl_poll_timeout macros instead of custom code.
> > 
> > Eugeniy Paltsev (5):
> >    DW SPI: fix tx data loss on FIFO flush
> >    DW SPI: fix transmit only mode
> >    DW SPI: refactor poll_transfer functions
> >    DW SPI: add option to use external gpio for chip select
> >    DW SPI: use 32 bit access instead of 16 and 32 bit mix
> > 
> >   drivers/spi/designware_spi.c | 132 ++++++++++++++++++++++++++++---------------
> >   1 file changed, 87 insertions(+), 45 deletions(-)
> 
> Applied to u-boot-spi/master

I guess that will be merged in U-Boot master tree sometime soon so
that will be a part of the next u-boot release, right?

-Alexey